-dot-machine-cfg for printing MachineFunction to a dot file
This pass allows a user to dump a MIR function to a dot file and view it as a graph. It is targeted to provide a similar functionality as -dot-cfg pass on LLVM-IR. As of now the pass also support below flags: -dot-mcfg-only [optional][won't print instructions in the graph just block name] -mcfg-dot-filename-prefix [optional][prefix to add to output dot file] -mcfg-func-name [optional] [specify function name or it's substring, handy if mir file contains multiple functions and you need to see graph of just one] More flags and details can be introduced as per the requirements in future. This pass is inspired from -dot-cfg IR pass and APIs are written in almost identical format. Patch by Yashwant Singh <Yashwant.Singh@amd.com> (yassingh) Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D133709
This commit is contained in:
Christudasan Devadasan
parent
e500f8f8a8
commit
32a8260ccc
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@ -119,81 +119,96 @@ struct GraphTraits<DOTFuncInfo *> : public GraphTraits<const BasicBlock *> {
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}
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};
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template <typename BasicBlockT>
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std::string SimpleNodeLabelString(const BasicBlockT *Node) {
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if (!Node->getName().empty())
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return Node->getName().str();
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std::string Str;
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raw_string_ostream OS(Str);
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Node->printAsOperand(OS, false);
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return OS.str();
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}
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template <typename BasicBlockT>
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std::string CompleteNodeLabelString(
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const BasicBlockT *Node,
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function_ref<void(raw_string_ostream &, const BasicBlockT &)>
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HandleBasicBlock,
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function_ref<void(std::string &, unsigned &, unsigned)>
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HandleComment) {
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enum { MaxColumns = 80 };
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std::string Str;
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raw_string_ostream OS(Str);
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if (Node->getName().empty()) {
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Node->printAsOperand(OS, false);
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OS << ':';
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}
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HandleBasicBlock(OS, *Node);
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std::string OutStr = OS.str();
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if (OutStr[0] == '\n')
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OutStr.erase(OutStr.begin());
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unsigned ColNum = 0;
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unsigned LastSpace = 0;
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for (unsigned i = 0; i != OutStr.length(); ++i) {
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if (OutStr[i] == '\n') { // Left justify
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OutStr[i] = '\\';
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OutStr.insert(OutStr.begin() + i + 1, 'l');
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ColNum = 0;
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LastSpace = 0;
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} else if (OutStr[i] == ';') { // Delete comments!
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unsigned Idx = OutStr.find('\n', i + 1); // Find end of line
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HandleComment(OutStr, i, Idx);
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} else if (ColNum == MaxColumns) { // Wrap lines.
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// Wrap very long names even though we can't find a space.
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if (!LastSpace)
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LastSpace = i;
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OutStr.insert(LastSpace, "\\l...");
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ColNum = i - LastSpace;
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LastSpace = 0;
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i += 3; // The loop will advance 'i' again.
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} else
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++ColNum;
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if (OutStr[i] == ' ')
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LastSpace = i;
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}
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return OutStr;
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}
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template <>
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struct DOTGraphTraits<DOTFuncInfo *> : public DefaultDOTGraphTraits {
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// Cache for is hidden property
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llvm::DenseMap<const BasicBlock *, bool> isOnDeoptOrUnreachablePath;
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DenseMap<const BasicBlock *, bool> isOnDeoptOrUnreachablePath;
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DOTGraphTraits(bool isSimple = false) : DefaultDOTGraphTraits(isSimple) {}
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static std::string getGraphName(DOTFuncInfo *CFGInfo) {
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return "CFG for '" + CFGInfo->getFunction()->getName().str() + "' function";
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}
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static std::string getSimpleNodeLabel(const BasicBlock *Node, DOTFuncInfo *) {
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if (!Node->getName().empty())
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return Node->getName().str();
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std::string Str;
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raw_string_ostream OS(Str);
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Node->printAsOperand(OS, false);
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return OS.str();
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}
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static void eraseComment(std::string &OutStr, unsigned &I, unsigned Idx) {
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OutStr.erase(OutStr.begin() + I, OutStr.begin() + Idx);
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--I;
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}
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static std::string getGraphName(DOTFuncInfo *CFGInfo) {
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return "CFG for '" + CFGInfo->getFunction()->getName().str() + "' function";
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}
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static std::string getSimpleNodeLabel(const BasicBlock *Node, DOTFuncInfo *) {
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return SimpleNodeLabelString(Node);
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}
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static std::string getCompleteNodeLabel(
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const BasicBlock *Node, DOTFuncInfo *,
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llvm::function_ref<void(raw_string_ostream &, const BasicBlock &)>
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function_ref<void(raw_string_ostream &, const BasicBlock &)>
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HandleBasicBlock = [](raw_string_ostream &OS,
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const BasicBlock &Node) -> void { OS << Node; },
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llvm::function_ref<void(std::string &, unsigned &, unsigned)>
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function_ref<void(std::string &, unsigned &, unsigned)>
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HandleComment = eraseComment) {
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enum { MaxColumns = 80 };
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std::string Str;
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raw_string_ostream OS(Str);
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if (Node->getName().empty()) {
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Node->printAsOperand(OS, false);
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OS << ":";
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}
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HandleBasicBlock(OS, *Node);
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std::string OutStr = OS.str();
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if (OutStr[0] == '\n')
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OutStr.erase(OutStr.begin());
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// Process string output to make it nicer...
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unsigned ColNum = 0;
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unsigned LastSpace = 0;
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for (unsigned i = 0; i != OutStr.length(); ++i) {
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if (OutStr[i] == '\n') { // Left justify
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OutStr[i] = '\\';
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OutStr.insert(OutStr.begin() + i + 1, 'l');
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ColNum = 0;
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LastSpace = 0;
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} else if (OutStr[i] == ';') { // Delete comments!
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unsigned Idx = OutStr.find('\n', i + 1); // Find end of line
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HandleComment(OutStr, i, Idx);
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} else if (ColNum == MaxColumns) { // Wrap lines.
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// Wrap very long names even though we can't find a space.
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if (!LastSpace)
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LastSpace = i;
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OutStr.insert(LastSpace, "\\l...");
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ColNum = i - LastSpace;
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LastSpace = 0;
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i += 3; // The loop will advance 'i' again.
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} else
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++ColNum;
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if (OutStr[i] == ' ')
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LastSpace = i;
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}
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return OutStr;
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return CompleteNodeLabelString(Node, HandleBasicBlock, HandleComment);
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}
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std::string getNodeLabel(const BasicBlock *Node, DOTFuncInfo *CFGInfo) {
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@ -0,0 +1,92 @@
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//===-- MachineCFGPrinter.h -------------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Analysis/CFGPrinter.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Support/DOTGraphTraits.h"
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namespace llvm {
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template <class GraphType> struct GraphTraits;
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class DOTMachineFuncInfo {
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private:
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const MachineFunction *F;
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public:
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DOTMachineFuncInfo(const MachineFunction *F) : F(F) {}
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const MachineFunction *getFunction() const { return this->F; }
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};
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template <>
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struct GraphTraits<DOTMachineFuncInfo *>
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: public GraphTraits<const MachineBasicBlock *> {
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static NodeRef getEntryNode(DOTMachineFuncInfo *CFGInfo) {
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return &(CFGInfo->getFunction()->front());
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}
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// nodes_iterator/begin/end - Allow iteration over all nodes in the graph
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using nodes_iterator = pointer_iterator<MachineFunction::const_iterator>;
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static nodes_iterator nodes_begin(DOTMachineFuncInfo *CFGInfo) {
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return nodes_iterator(CFGInfo->getFunction()->begin());
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}
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static nodes_iterator nodes_end(DOTMachineFuncInfo *CFGInfo) {
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return nodes_iterator(CFGInfo->getFunction()->end());
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}
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static size_t size(DOTMachineFuncInfo *CFGInfo) {
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return CFGInfo->getFunction()->size();
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}
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};
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template <>
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struct DOTGraphTraits<DOTMachineFuncInfo *> : public DefaultDOTGraphTraits {
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DOTGraphTraits(bool isSimple = false) : DefaultDOTGraphTraits(isSimple) {}
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static void eraseComment(std::string &OutStr, unsigned &I, unsigned Idx) {
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OutStr.erase(OutStr.begin() + I, OutStr.begin() + Idx);
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--I;
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}
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static std::string getSimpleNodeLabel(const MachineBasicBlock *Node,
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DOTMachineFuncInfo *) {
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return SimpleNodeLabelString(Node);
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}
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static std::string getCompleteNodeLabel(
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const MachineBasicBlock *Node, DOTMachineFuncInfo *,
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function_ref<void(raw_string_ostream &, const MachineBasicBlock &)>
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HandleBasicBlock =
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[](raw_string_ostream &OS,
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const MachineBasicBlock &Node) -> void { OS << Node; },
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function_ref<void(std::string &, unsigned &, unsigned)>
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HandleComment = eraseComment) {
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return CompleteNodeLabelString(Node, HandleBasicBlock, HandleComment);
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}
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std::string getNodeLabel(const MachineBasicBlock *Node,
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DOTMachineFuncInfo *CFGInfo) {
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if (isSimple())
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return getSimpleNodeLabel(Node, CFGInfo);
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return getCompleteNodeLabel(Node, CFGInfo);
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}
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static std::string getGraphName(DOTMachineFuncInfo *CFGInfo) {
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return "Machine CFG for '" + CFGInfo->getFunction()->getName().str() +
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"' function";
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}
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};
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} // namespace llvm
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@ -159,6 +159,7 @@ DUMMY_MACHINE_FUNCTION_PASS("reg-usage-collector", RegUsageInfoCollectorPass, ()
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DUMMY_MACHINE_FUNCTION_PASS("funclet-layout", FuncletLayoutPass, ())
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DUMMY_MACHINE_FUNCTION_PASS("stackmap-liveness", StackMapLivenessPass, ())
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DUMMY_MACHINE_FUNCTION_PASS("removeredundantdebugvalues", RemoveRedundantDebugValuesPass, ())
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DUMMY_MACHINE_FUNCTION_PASS("dot-machine-cfg", MachineCFGPrinter, ())
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DUMMY_MACHINE_FUNCTION_PASS("livedebugvalues", LiveDebugValuesPass, ())
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DUMMY_MACHINE_FUNCTION_PASS("early-tailduplication", EarlyTailDuplicatePass, ())
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DUMMY_MACHINE_FUNCTION_PASS("opt-phis", OptimizePHIsPass, ())
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@ -408,6 +408,9 @@ namespace llvm {
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/// RemoveRedundantDebugValues pass.
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extern char &RemoveRedundantDebugValuesID;
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/// MachineCFGPrinter pass.
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extern char &MachineCFGPrinterID;
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/// LiveDebugValues pass
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extern char &LiveDebugValuesID;
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@ -277,6 +277,7 @@ void initializeMachineBlockFrequencyInfoPass(PassRegistry&);
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void initializeMachineBlockPlacementPass(PassRegistry&);
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void initializeMachineBlockPlacementStatsPass(PassRegistry&);
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void initializeMachineBranchProbabilityInfoPass(PassRegistry&);
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void initializeMachineCFGPrinterPass(PassRegistry &);
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void initializeMachineCSEPass(PassRegistry&);
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void initializeMachineCombinerPass(PassRegistry&);
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void initializeMachineCopyPropagationPass(PassRegistry&);
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@ -101,6 +101,7 @@ add_llvm_component_library(LLVMCodeGen
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MachineBlockFrequencyInfo.cpp
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MachineBlockPlacement.cpp
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MachineBranchProbabilityInfo.cpp
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MachineCFGPrinter.cpp
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MachineCombiner.cpp
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MachineCopyPropagation.cpp
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MachineCSE.cpp
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@ -69,6 +69,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
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initializeMachineBlockFrequencyInfoPass(Registry);
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initializeMachineBlockPlacementPass(Registry);
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initializeMachineBlockPlacementStatsPass(Registry);
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initializeMachineCFGPrinterPass(Registry);
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initializeMachineCSEPass(Registry);
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initializeMachineCombinerPass(Registry);
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initializeMachineCopyPropagationPass(Registry);
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@ -0,0 +1,95 @@
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//===- MachineCFGPrinter.cpp - DOT Printer for Machine Functions ----------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the `-dot-machine-cfg` analysis pass, which emits
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// Machine Function in DOT format in file titled `<prefix>.<function-name>.dot.
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MachineCFGPrinter.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/Pass.h"
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#include "llvm/PassRegistry.h"
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#include "llvm/Support/GraphWriter.h"
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using namespace llvm;
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#define DEBUG_TYPE "dot-machine-cfg"
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static cl::opt<std::string>
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MCFGFuncName("mcfg-func-name", cl::Hidden,
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cl::desc("The name of a function (or its substring)"
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" whose CFG is viewed/printed."));
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static cl::opt<std::string> MCFGDotFilenamePrefix(
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"mcfg-dot-filename-prefix", cl::Hidden,
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cl::desc("The prefix used for the Machine CFG dot file names."));
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static cl::opt<bool>
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CFGOnly("dot-mcfg-only", cl::init(false), cl::Hidden,
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cl::desc("Print only the CFG without blocks body"));
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static void writeMCFGToDotFile(MachineFunction &MF) {
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std::string Filename =
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(MCFGDotFilenamePrefix + "." + MF.getName() + ".dot").str();
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errs() << "Writing '" << Filename << "'...";
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std::error_code EC;
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raw_fd_ostream File(Filename, EC, sys::fs::OF_Text);
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DOTMachineFuncInfo MCFGInfo(&MF);
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if (!EC)
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WriteGraph(File, &MCFGInfo, CFGOnly);
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else
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errs() << " error opening file for writing!";
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errs() << '\n';
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}
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namespace {
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class MachineCFGPrinter : public MachineFunctionPass {
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public:
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static char ID;
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MachineCFGPrinter();
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bool runOnMachineFunction(MachineFunction &MF) override;
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesCFG();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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};
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} // namespace
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char MachineCFGPrinter::ID = 0;
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char &llvm::MachineCFGPrinterID = MachineCFGPrinter::ID;
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INITIALIZE_PASS(MachineCFGPrinter, DEBUG_TYPE, "Machine CFG Printer Pass",
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false, true)
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/// Default construct and initialize the pass.
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MachineCFGPrinter::MachineCFGPrinter() : MachineFunctionPass(ID) {
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initializeMachineCFGPrinterPass(*PassRegistry::getPassRegistry());
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}
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bool MachineCFGPrinter::runOnMachineFunction(MachineFunction &MF) {
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if (!MCFGFuncName.empty() && !MF.getName().contains(MCFGFuncName))
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return false;
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errs() << "Writing Machine CFG for function ";
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errs().write_escaped(MF.getName()) << '\n';
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writeMCFGToDotFile(MF);
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return false;
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}
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@ -0,0 +1,24 @@
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# RUN: llc -mtriple=amdgcn-- -run-pass=dot-machine-cfg -mcfg-dot-filename-prefix=%t -mcfg-func-name=func2 -o - %s 2>&1 > /dev/null
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# RUN: FileCheck %s -input-file=%t.func2.dot --check-prefix=MCFG
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# MCFG-NOT: digraph "Machine CFG for 'func1' function"
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name: func1
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body: |
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bb.0:
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$sgpr0 = S_LOAD_DWORD_IMM $sgpr10_sgpr11, 0, 0
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$sgpr1 = S_LOAD_DWORD_IMM $sgpr12_sgpr13, 0, 0
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S_ENDPGM 0
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...
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# MCFG: digraph "Machine CFG for 'func2' function"
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# MCFG-NEXT: label="Machine CFG for 'func2' function"
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# MCFG: Node{{[0-9A-Za-z]*}} [shape=record,label="{%bb.0:bb.0:\l $sgpr0 = S_LOAD_DWORD_IMM $sgpr12_sgpr13, 0, 0\l $sgpr1 = S_LOAD_DWORD_IMM $sgpr6_sgpr7, 0, 0\l $sgpr2 = S_LOAD_DWORD_IMM $sgpr14_sgpr15, 0, 0\l S_ENDPGM 0\l}"];
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---
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name: func2
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body: |
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bb.0:
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$sgpr0 = S_LOAD_DWORD_IMM $sgpr12_sgpr13, 0, 0
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$sgpr1 = S_LOAD_DWORD_IMM $sgpr6_sgpr7, 0, 0
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$sgpr2 = S_LOAD_DWORD_IMM $sgpr14_sgpr15, 0, 0
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S_ENDPGM 0
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...
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@ -0,0 +1,87 @@
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# RUN: llc -mtriple=amdgcn-- -run-pass=dot-machine-cfg -mcfg-dot-filename-prefix=%t -o - %s 2>&1 > /dev/null
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# RUN: FileCheck %s -input-file=%t.irreducible.dot --check-prefix=MCFG
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# RUN: llc -mtriple=amdgcn-- -run-pass=dot-machine-cfg -mcfg-dot-filename-prefix=%t -dot-mcfg-only -o - %s 2>&1 > /dev/null
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# RUN: FileCheck %s -input-file=%t.irreducible.dot --check-prefix=MCFG-ONLY
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# MCFG: digraph "Machine CFG for 'irreducible' function"
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# MCFG-NEXT: label="Machine CFG for 'irreducible' function"
|
||||
# MCFG: Node{{[0-9A-Za-z]*}} [shape=record,label="{%bb.0:bb.0:\l successors: %bb.1(0x40000000), %bb.2(0x40000000)\l liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9,\l... $sgpr10_sgpr11, $sgpr14, $sgpr15, $sgpr16\l %0:sreg_32 = IMPLICIT_DEF\l %1:vgpr_32 = COPY $vgpr0\l %2:vgpr_32 = V_MOV_B32_e32 0, implicit $exec\l S_CMP_EQ_U32 %0:sreg_32, 0, implicit-def $scc\l S_CBRANCH_SCC1 %bb.1, implicit $scc\l S_BRANCH %bb.2\l}"];
|
||||
# MCFG-NEXT: Node{{[0-9A-Za-z]*}} -> Node{{[0-9A-Za-z]*}};
|
||||
# MCFG-NEXT: Node{{[0-9A-Za-z]*}} -> Node{{[0-9A-Za-z]*}};
|
||||
# MCFG-NEXT: Node{{[0-9A-Za-z]*}} [shape=record,label="{%bb.1:bb.1:\l\l successors: %bb.3(0x80000000)\l\l %3:vgpr_32 = PHI %2:vgpr_32, %bb.0, %4:vgpr_32, %bb.5\l %5:vgpr_32 = V_ADD_U32_e64 %3:vgpr_32, 1, 0, implicit $exec\l S_BRANCH %bb.3\l}"];
|
||||
# MCFG-NEXT: Node{{[0-9A-Za-z]*}} -> Node{{[0-9A-Za-z]*}};
|
||||
# MCFG-NEXT: Node{{[0-9A-Za-z]*}} [shape=record,label="{%bb.2:bb.2:\l\l successors: %bb.3(0x80000000)\l\l %6:vgpr_32 = PHI %2:vgpr_32, %bb.0, %4:vgpr_32, %bb.4\l %7:vgpr_32 = V_ADD_U32_e64 %6:vgpr_32, 2, 0, implicit $exec\l}"];
|
||||
# MCFG-NEXT: Node{{[0-9A-Za-z]*}} -> Node{{[0-9A-Za-z]*}};
|
||||
# MCFG-NEXT: Node{{[0-9A-Za-z]*}} [shape=record,label="{%bb.3:bb.3:\l\l successors: %bb.4(0x80000000)\l\l %4:vgpr_32 = PHI %5:vgpr_32, %bb.1, %7:vgpr_32, %bb.2\l}"];
|
||||
# MCFG-NEXT: Node{{[0-9A-Za-z]*}} -> Node{{[0-9A-Za-z]*}};
|
||||
# MCFG-NEXT: Node{{[0-9A-Za-z]*}} [shape=record,label="{%bb.4:bb.4:\l\l successors: %bb.2(0x40000000), %bb.5(0x40000000)\l\l %8:vgpr_32 = V_AND_B32_e32 3, %1:vgpr_32, implicit $exec\l %9:sreg_64 = V_CMP_EQ_U32_e64 %8:vgpr_32, 2, implicit $exec\l %10:sreg_64 = SI_IF killed %9:sreg_64, %bb.2, implicit-def dead $exec,\l... implicit-def dead $scc, implicit $exec\l}"];
|
||||
# MCFG-NEXT: Node{{[0-9A-Za-z]*}} -> Node{{[0-9A-Za-z]*}};
|
||||
# MCFG-NEXT: Node{{[0-9A-Za-z]*}} -> Node{{[0-9A-Za-z]*}};
|
||||
# MCFG-NEXT: Node{{[0-9A-Za-z]*}} [shape=record,label="{%bb.5:bb.5:\l\l successors: %bb.1(0x40000000), %bb.6(0x40000000)\l\l %11:sreg_64 = V_CMP_EQ_U32_e64 %8:vgpr_32, 1, implicit $exec\l %12:sreg_64 = SI_IF killed %11:sreg_64, %bb.1, implicit-def dead $exec,\l... implicit-def dead $scc, implicit $exec\l}"];
|
||||
# MCFG-NEXT: Node{{[0-9A-Za-z]*}} -> Node{{[0-9A-Za-z]*}};
|
||||
# MCFG-NEXT: Node{{[0-9A-Za-z]*}} -> Node{{[0-9A-Za-z]*}};
|
||||
# MCFG-NEXT: Node{{[0-9A-Za-z]*}} [shape=record,label="{%bb.6:bb.6:\l\l\l S_ENDPGM 0\l}"];
|
||||
|
||||
# MCFG-ONLY: digraph "Machine CFG for 'irreducible' function"
|
||||
# MCFG-ONLY-NEXT: label="Machine CFG for 'irreducible' function"
|
||||
# MCFG-ONLY: Node{{[0-9A-Za-z]*}} [shape=record,label="{%bb.0}"];
|
||||
# MCFG-ONLY-NEXT: Node{{[0-9A-Za-z]*}} -> Node{{[0-9A-Za-z]*}};
|
||||
# MCFG-ONLY-NEXT: Node{{[0-9A-Za-z]*}} -> Node{{[0-9A-Za-z]*}};
|
||||
# MCFG-ONLY-NEXT: Node{{[0-9A-Za-z]*}} [shape=record,label="{%bb.1}"];
|
||||
# MCFG-ONLY-NEXT: Node{{[0-9A-Za-z]*}} -> Node{{[0-9A-Za-z]*}};
|
||||
# MCFG-ONLY-NEXT: Node{{[0-9A-Za-z]*}} [shape=record,label="{%bb.2}"];
|
||||
# MCFG-ONLY-NEXT: Node{{[0-9A-Za-z]*}} -> Node{{[0-9A-Za-z]*}};
|
||||
# MCFG-ONLY-NEXT: Node{{[0-9A-Za-z]*}} [shape=record,label="{%bb.3}"];
|
||||
# MCFG-ONLY-NEXT: Node{{[0-9A-Za-z]*}} -> Node{{[0-9A-Za-z]*}};
|
||||
# MCFG-ONLY-NEXT: Node{{[0-9A-Za-z]*}} [shape=record,label="{%bb.4}"];
|
||||
# MCFG-ONLY-NEXT: Node{{[0-9A-Za-z]*}} -> Node{{[0-9A-Za-z]*}};
|
||||
# MCFG-ONLY-NEXT: Node{{[0-9A-Za-z]*}} -> Node{{[0-9A-Za-z]*}};
|
||||
# MCFG-ONLY-NEXT: Node{{[0-9A-Za-z]*}} [shape=record,label="{%bb.5}"];
|
||||
# MCFG-ONLY-NEXT: Node{{[0-9A-Za-z]*}} -> Node{{[0-9A-Za-z]*}};
|
||||
# MCFG-ONLY-NEXT: Node{{[0-9A-Za-z]*}} -> Node{{[0-9A-Za-z]*}};
|
||||
# MCFG-ONLY-NEXT: Node{{[0-9A-Za-z]*}} [shape=record,label="{%bb.6}"];
|
||||
---
|
||||
name: irreducible
|
||||
tracksRegLiveness: true
|
||||
machineFunctionInfo:
|
||||
isEntryFunction: true
|
||||
body: |
|
||||
bb.0:
|
||||
successors: %bb.1, %bb.2
|
||||
liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr14, $sgpr15, $sgpr16
|
||||
|
||||
%0:sreg_32 = IMPLICIT_DEF
|
||||
%2:vgpr_32 = COPY $vgpr0
|
||||
%3:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
||||
S_CMP_EQ_U32 %0, 0, implicit-def $scc
|
||||
S_CBRANCH_SCC1 %bb.1, implicit $scc
|
||||
S_BRANCH %bb.2
|
||||
|
||||
bb.1:
|
||||
%28:vgpr_32 = PHI %3, %bb.0, %49, %bb.5
|
||||
%29:vgpr_32 = V_ADD_U32_e64 %28, 1, 0, implicit $exec
|
||||
S_BRANCH %bb.3
|
||||
|
||||
bb.2:
|
||||
%38:vgpr_32 = PHI %3, %bb.0, %49, %bb.4
|
||||
%39:vgpr_32 = V_ADD_U32_e64 %38, 2, 0, implicit $exec
|
||||
|
||||
bb.3:
|
||||
%49:vgpr_32 = PHI %29, %bb.1, %39, %bb.2
|
||||
|
||||
bb.4:
|
||||
successors: %bb.2, %bb.5
|
||||
|
||||
%50:vgpr_32 = V_AND_B32_e32 3, %2, implicit $exec
|
||||
%51:sreg_64 = V_CMP_EQ_U32_e64 %50, 2, implicit $exec
|
||||
%52:sreg_64 = SI_IF killed %51:sreg_64, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
|
||||
bb.5:
|
||||
successors: %bb.1, %bb.6
|
||||
%61:sreg_64 = V_CMP_EQ_U32_e64 %50, 1, implicit $exec
|
||||
%62:sreg_64 = SI_IF killed %61:sreg_64, %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
|
||||
bb.6:
|
||||
S_ENDPGM 0
|
||||
...
|
||||
|
||||
|
|
@ -0,0 +1,2 @@
|
|||
if not 'AMDGPU' in config.root.targets:
|
||||
config.unsupported = True
|
||||
Loading…
Reference in New Issue