[CodeExtractor] Preserve topological order for the return blocks.

Differential Revision: https://reviews.llvm.org/D108673
This commit is contained in:
Vyacheslav Zakharin 2021-08-24 16:19:49 -07:00
parent 85eedf7acb
commit 2e192ab1f4
14 changed files with 110 additions and 104 deletions

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@ -1560,8 +1560,6 @@ for (int i = 0; i < argc; ++i) {
// CHECK3-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
// CHECK3-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
// CHECK3-NEXT: br label [[OMP_PAR_REGION:%.*]]
// CHECK3: omp.par.outlined.exit.exitStub:
// CHECK3-NEXT: ret void
// CHECK3: omp.par.region:
// CHECK3-NEXT: [[TMP1:%.*]] = load float, float* @flag, align 4
// CHECK3-NEXT: [[TOBOOL:%.*]] = fcmp une float [[TMP1]], 0.000000e+00
@ -1607,6 +1605,8 @@ for (int i = 0; i < argc; ++i) {
// CHECK3-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB]]
// CHECK3: .split:
// CHECK3-NEXT: br label [[TMP3]]
// CHECK3: omp.par.outlined.exit.exitStub:
// CHECK3-NEXT: ret void
//
//
// CHECK3-LABEL: define {{[^@]+}}@.omp_task_entry.
@ -2187,8 +2187,6 @@ for (int i = 0; i < argc; ++i) {
// CHECK4-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
// CHECK4-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
// CHECK4-NEXT: br label [[OMP_PAR_REGION:%.*]]
// CHECK4: omp.par.outlined.exit.exitStub:
// CHECK4-NEXT: ret void
// CHECK4: omp.par.region:
// CHECK4-NEXT: [[TMP1:%.*]] = load float, float* @flag, align 4
// CHECK4-NEXT: [[TOBOOL:%.*]] = fcmp une float [[TMP1]], 0.000000e+00
@ -2234,6 +2232,8 @@ for (int i = 0; i < argc; ++i) {
// CHECK4-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB]]
// CHECK4: .split:
// CHECK4-NEXT: br label [[TMP3]]
// CHECK4: omp.par.outlined.exit.exitStub:
// CHECK4-NEXT: ret void
//
//
// CHECK4-LABEL: define {{[^@]+}}@.omp_task_entry.
@ -4054,8 +4054,6 @@ for (int i = 0; i < argc; ++i) {
// CHECK9-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
// CHECK9-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
// CHECK9-NEXT: br label [[OMP_PAR_REGION:%.*]]
// CHECK9: omp.par.outlined.exit.exitStub:
// CHECK9-NEXT: ret void
// CHECK9: omp.par.region:
// CHECK9-NEXT: [[TMP1:%.*]] = load float, float* @flag, align 4
// CHECK9-NEXT: [[TOBOOL:%.*]] = fcmp une float [[TMP1]], 0.000000e+00
@ -4101,6 +4099,8 @@ for (int i = 0; i < argc; ++i) {
// CHECK9-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB]]
// CHECK9: .split:
// CHECK9-NEXT: br label [[TMP3]]
// CHECK9: omp.par.outlined.exit.exitStub:
// CHECK9-NEXT: ret void
//
//
// CHECK9-LABEL: define {{[^@]+}}@.omp_task_entry.
@ -4681,8 +4681,6 @@ for (int i = 0; i < argc; ++i) {
// CHECK10-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
// CHECK10-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
// CHECK10-NEXT: br label [[OMP_PAR_REGION:%.*]]
// CHECK10: omp.par.outlined.exit.exitStub:
// CHECK10-NEXT: ret void
// CHECK10: omp.par.region:
// CHECK10-NEXT: [[TMP1:%.*]] = load float, float* @flag, align 4
// CHECK10-NEXT: [[TOBOOL:%.*]] = fcmp une float [[TMP1]], 0.000000e+00
@ -4728,6 +4726,8 @@ for (int i = 0; i < argc; ++i) {
// CHECK10-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB]]
// CHECK10: .split:
// CHECK10-NEXT: br label [[TMP3]]
// CHECK10: omp.par.outlined.exit.exitStub:
// CHECK10-NEXT: ret void
//
//
// CHECK10-LABEL: define {{[^@]+}}@.omp_task_entry.

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@ -753,8 +753,6 @@ int main (int argc, char **argv) {
// CHECK3-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
// CHECK3-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
// CHECK3-NEXT: br label [[OMP_PAR_REGION:%.*]]
// CHECK3: omp.par.outlined.exit.exitStub:
// CHECK3-NEXT: ret void
// CHECK3: omp.par.region:
// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 1
// CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
@ -765,6 +763,8 @@ int main (int argc, char **argv) {
// CHECK3-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
// CHECK3: omp.par.pre_finalize:
// CHECK3-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
// CHECK3: omp.par.outlined.exit.exitStub:
// CHECK3-NEXT: ret void
//
//
// CHECK3-LABEL: define {{[^@]+}}@_Z3fooIiEvT_
@ -809,8 +809,6 @@ int main (int argc, char **argv) {
// CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTRELOADED]], align 8
// CHECK3-NEXT: [[VAR:%.*]] = alloca double*, align 8
// CHECK3-NEXT: br label [[OMP_PAR_REGION:%.*]]
// CHECK3: omp.par.outlined.exit.exitStub:
// CHECK3-NEXT: ret void
// CHECK3: omp.par.region:
// CHECK3-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[ARGC_ADDR]], align 8
// CHECK3-NEXT: call void @_Z3fooIPPcEvT_(i8** [[TMP2]])
@ -821,6 +819,8 @@ int main (int argc, char **argv) {
// CHECK3-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
// CHECK3: omp.par.pre_finalize:
// CHECK3-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
// CHECK3: omp.par.outlined.exit.exitStub:
// CHECK3-NEXT: ret void
//
//
// CHECK3-LABEL: define {{[^@]+}}@_Z3fooIPPcEvT_
@ -877,8 +877,6 @@ int main (int argc, char **argv) {
// CHECK4-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
// CHECK4-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
// CHECK4-NEXT: br label [[OMP_PAR_REGION:%.*]]
// CHECK4: omp.par.outlined.exit.exitStub:
// CHECK4-NEXT: ret void
// CHECK4: omp.par.region:
// CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 1, !dbg [[DBG34:![0-9]+]]
// CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !dbg [[DBG34]]
@ -889,6 +887,8 @@ int main (int argc, char **argv) {
// CHECK4-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]], !dbg [[DBG34]]
// CHECK4: omp.par.pre_finalize:
// CHECK4-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]], !dbg [[DBG34]]
// CHECK4: omp.par.outlined.exit.exitStub:
// CHECK4-NEXT: ret void
//
//
// CHECK4-LABEL: define {{[^@]+}}@_Z3fooIiEvT_
@ -935,8 +935,6 @@ int main (int argc, char **argv) {
// CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTRELOADED]], align 8
// CHECK4-NEXT: [[VAR:%.*]] = alloca double*, align 8
// CHECK4-NEXT: br label [[OMP_PAR_REGION:%.*]]
// CHECK4: omp.par.outlined.exit.exitStub:
// CHECK4-NEXT: ret void
// CHECK4: omp.par.region:
// CHECK4-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[ARGC_ADDR]], align 8, !dbg [[DBG57:![0-9]+]]
// CHECK4-NEXT: call void @_Z3fooIPPcEvT_(i8** [[TMP2]]), !dbg [[DBG57]]
@ -948,6 +946,8 @@ int main (int argc, char **argv) {
// CHECK4-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]], !dbg [[DBG66:![0-9]+]]
// CHECK4: omp.par.pre_finalize:
// CHECK4-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]], !dbg [[DBG66]]
// CHECK4: omp.par.outlined.exit.exitStub:
// CHECK4-NEXT: ret void
//
//
// CHECK4-LABEL: define {{[^@]+}}@_Z3fooIPPcEvT_
@ -958,4 +958,4 @@ int main (int argc, char **argv) {
// CHECK4-NEXT: call void @llvm.dbg.declare(metadata i8*** [[ARGC_ADDR]], metadata [[META70:![0-9]+]], metadata !DIExpression()), !dbg [[DBG71:![0-9]+]]
// CHECK4-NEXT: ret void, !dbg [[DBG71]]
//
//
//

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@ -434,7 +434,6 @@ Function *IROutliner::createFunction(Module &M, OutlinableGroup &Group,
static BasicBlock *moveFunctionData(Function &Old, Function &New) {
Function::iterator CurrBB, NextBB, FinalBB;
BasicBlock *NewEnd = nullptr;
std::vector<Instruction *> DebugInsts;
for (CurrBB = Old.begin(), FinalBB = Old.end(); CurrBB != FinalBB;
CurrBB = NextBB) {
NextBB = std::next(CurrBB);
@ -444,6 +443,8 @@ static BasicBlock *moveFunctionData(Function &Old, Function &New) {
if (isa<ReturnInst>(I))
NewEnd = &(*CurrBB);
std::vector<Instruction *> DebugInsts;
for (Instruction &Val : *CurrBB) {
// We must handle the scoping of called functions differently than
// other outlined instructions.

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@ -1389,12 +1389,17 @@ void CodeExtractor::moveCodeToFunction(Function *newFunction) {
Function::BasicBlockListType &oldBlocks = oldFunc->getBasicBlockList();
Function::BasicBlockListType &newBlocks = newFunction->getBasicBlockList();
auto newFuncIt = newFunction->front().getIterator();
for (BasicBlock *Block : Blocks) {
// Delete the basic block from the old function, and the list of blocks
oldBlocks.remove(Block);
// Insert this basic block into the new function
newBlocks.push_back(Block);
// Insert the original blocks after the entry block created
// for the new function. The entry block may be followed
// by a set of exit blocks at this point, but these exit
// blocks better be placed at the end of the new function.
newFuncIt = newBlocks.insertAfter(newFuncIt, Block);
}
}

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@ -42,8 +42,6 @@ declare void @foo()
; CHECK-LABEL: define internal void @test3.loop.1()
; CHECK-NEXT: newFuncRoot:
; CHECK-NEXT: br label %loop.1
; CHECK: exit.exitStub:
; CHECK-NEXT: ret void
; CHECK: loop.1:
; CHECK-NEXT: %index.1 = phi i32 [ %next.1, %loop.1.loop.1_crit_edge ], [ 10, %newFuncRoot ]
; CHECK-NEXT: tail call void @foo()
@ -52,12 +50,12 @@ declare void @foo()
; CHECK-NEXT: br i1 %repeat.1, label %loop.1.loop.1_crit_edge, label %exit.exitStub
; CHECK: loop.1.loop.1_crit_edge:
; CHECK-NEXT: br label %loop.1
; CHECK: exit.exitStub:
; CHECK-NEXT: ret void
; CHECK-LABEL: define internal void @test3.loop.0()
; CHECK-NEXT: newFuncRoot:
; CHECK-NEXT: br label %loop.0
; CHECK: loop.0.loop.1_crit_edge.exitStub:
; CHECK-NEXT: ret void
; CHECK: loop.0:
; CHECK-NEXT: %index.0 = phi i32 [ 10, %newFuncRoot ], [ %next.0, %loop.0.loop.0_crit_edge ]
; CHECK-NEXT: tail call void @foo()
@ -66,3 +64,5 @@ declare void @foo()
; CHECK-NEXT: br i1 %repeat.0, label %loop.0.loop.0_crit_edge, label %loop.0.loop.1_crit_edge.exitStub
; CHECK: loop.0.loop.0_crit_edge:
; CHECK-NEXT: br label %loop.0
; CHECK: loop.0.loop.1_crit_edge.exitStub:
; CHECK-NEXT: ret void

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@ -37,10 +37,10 @@ declare void @foo()
; CHECK-LABEL: define internal void @test.loopentry()
; CHECK-NEXT: newFuncRoot:
; CHECK-NEXT: br label %loopentry
; CHECK: loopexit.exitStub:
; CHECK-NEXT: ret void
; CHECK: loopentry:
; CHECK-NEXT: br i1 false, label %loopbody, label %loopexit.exitStub
; CHECK: loopbody:
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label %loopentry
; CHECK: loopexit.exitStub:
; CHECK-NEXT: ret void

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@ -35,13 +35,13 @@ exit.1: ; preds = %loopentry
; CHECK-LABEL: define internal i1 @test.loopentry()
; CHECK-NEXT: newFuncRoot:
; CHECK-NEXT: br label %loopentry
; CHECK: exit.1.exitStub:
; CHECK-NEXT: ret i1 true
; CHECK: exit.0.exitStub:
; CHECK-NEXT: ret i1 false
; CHECK: loopentry:
; CHECK-NEXT: br i1 true, label %exit.1.exitStub, label %loopexit
; CHECK: loopexit:
; CHECK-NEXT: br i1 false, label %loopexit.loopentry_crit_edge, label %exit.0.exitStub
; CHECK: loopexit.loopentry_crit_edge:
; CHECK-NEXT: br label %loopentry
; CHECK: exit.1.exitStub:
; CHECK-NEXT: ret i1 true
; CHECK: exit.0.exitStub:
; CHECK-NEXT: ret i1 false

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@ -72,13 +72,13 @@ bb:
; CHECK: newFuncRoot:
; CHECK-NEXT: br label %bb3
; CHECK: bb4.exitStub:
; CHECK-NEXT: ret void
; CHECK: bb3:
; CHECK-NOT: lifetime.ed
; CHECK: br label %bb4.exitStub
; CHECK: bb4.exitStub:
; CHECK-NEXT: ret void
!llvm.module.flags = !{!0}

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@ -9,11 +9,11 @@
; CHECK-LABEL: define internal void @tinkywinky.1.ontrue() {
; CHECK-NEXT: newFuncRoot:
; CHECK-NEXT: br label %ontrue
; CHECK: onfalse{{.*}}:
; CHECK-NEXT: ret void
; CHECK: ontrue:
; CHECK-NEXT: call void @patatino()
; CHECK-NEXT: br label %onfalse{{.*}}
; CHECK: onfalse{{.*}}:
; CHECK-NEXT: ret void
; CHECK-NEXT: }
declare void @patatino()

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@ -56,16 +56,16 @@ return: ; preds = %exit2, %exit1
; CHECK-LABEL: define {{.*}}@foo.cold.1(
; CHECK: br
; CHECK: [[exit1Stub:.*]]:
; CHECK-NEXT: ret i1 true
; CHECK: [[returnStub:.*]]:
; CHECK-NEXT: ret i1 false
; CHECK: call {{.*}}@sink
; CHECK-NEXT: [[cmp:%.*]] = icmp
; CHECK-NEXT: br i1 [[cmp]], label %[[exit1Stub]], label %exit2
; CHECK-NEXT: br i1 [[cmp]], label %[[exit1Stub:.*]], label %exit2
; CHECK-LABEL: exit2:
; CHECK-NEXT: call {{.*}}@sideeffect(i32 2)
; CHECK-NEXT: br label %[[returnStub]]
; CHECK-NEXT: br label %[[returnStub:.*]]
; CHECK: [[exit1Stub]]:
; CHECK-NEXT: ret i1 true
; CHECK: [[returnStub]]:
; CHECK-NEXT: ret i1 false
declare void @sink(...) cold

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@ -86,11 +86,6 @@ entry:
}
; CHECK: define internal void @outlined_ir_func_0(i32* [[ARG0:%.*]], i32* [[ARG1:%.*]], i32* [[ARG2:%.*]], i32* [[ARG3:%.*]], i32* [[ARG4:%.*]], i32 [[ARG5:%.*]]) #1 {
; CHECK: _after_outline.exitStub:
; CHECK-NEXT: switch i32 [[ARG5]], label [[BLOCK:%.*]] [
; CHECK-NEXT: i32 0, label %[[BLOCK_0:.*]]
; CHECK-NEXT: i32 1, label %[[BLOCK_1:.*]]
; CHECK: entry_to_outline:
; CHECK-NEXT: store i32 2, i32* [[ARG0]], align 4
; CHECK-NEXT: store i32 3, i32* [[ARG1]], align 4
@ -101,6 +96,11 @@ entry:
; CHECK-NEXT: store i32 [[ADD]], i32* [[ARG2]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG2]], align 4
; CHECK: _after_outline.exitStub:
; CHECK-NEXT: switch i32 [[ARG5]], label [[BLOCK:%.*]] [
; CHECK-NEXT: i32 0, label %[[BLOCK_0:.*]]
; CHECK-NEXT: i32 1, label %[[BLOCK_1:.*]]
; CHECK: [[BLOCK_0]]:
; CHECK-NEXT: store i32 [[ADD]], i32* [[ARG3]], align 4
; CHECK-NEXT: store i32 [[TMP2]], i32* [[ARG4]], align 4

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@ -84,15 +84,15 @@ entry:
}
; CHECK: define internal void @outlined_ir_func_0(i32* [[ARG0:%.*]], i32* [[ARG1:%.*]], i32* [[ARG2:%.*]], i32* [[ARG3:%.*]], i32* [[ARG4:%.*]]) #1 {
; CHECK: entry_after_outline.exitStub:
; CHECK-NEXT: store i32 [[ADD:%.*]], i32* [[ARG3]], align 4
; CHECK-NEXT: store i32 [[TMP2:%.*]], i32* [[ARG4]], align 4
; CHECK: entry_to_outline:
; CHECK-NEXT: store i32 2, i32* [[ARG0]], align 4
; CHECK-NEXT: store i32 3, i32* [[ARG1]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARG0]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARG1]], align 4
; CHECK-NEXT: [[ADD]] = add i32 [[TMP0]], [[TMP1]]
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[TMP0]], [[TMP1]]
; CHECK-NEXT: store i32 [[ADD]], i32* [[ARG2]], align 4
; CHECK-NEXT: [[TMP2]] = load i32, i32* [[ARG2]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG2]], align 4
; CHECK: entry_after_outline.exitStub:
; CHECK-NEXT: store i32 [[ADD]], i32* [[ARG3]], align 4
; CHECK-NEXT: store i32 [[TMP2]], i32* [[ARG4]], align 4

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@ -4715,8 +4715,6 @@ entry:
; CHECK1-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
@ -4731,6 +4729,8 @@ entry:
; CHECK1-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
; CHECK1: omp.par.pre_finalize:
; CHECK1-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
@ -4860,8 +4860,6 @@ entry:
; CHECK1-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
@ -4897,6 +4895,8 @@ entry:
; CHECK1: omp_region.body.split:
; CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK1-NEXT: br label [[OMP_REGION_END]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8
@ -4944,8 +4944,6 @@ entry:
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TMP1:%.*]] = load float, float* [[F_RELOADED]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
@ -4980,6 +4978,8 @@ entry:
; CHECK1: omp_region.body.split:
; CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK1-NEXT: br label [[OMP_REGION_END]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
@ -5029,8 +5029,6 @@ entry:
; CHECK1-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
@ -5069,6 +5067,8 @@ entry:
; CHECK1: omp_region.body.split:
; CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK1-NEXT: br label [[OMP_REGION_END]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..12
@ -5114,8 +5114,6 @@ entry:
; CHECK1-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
@ -5154,6 +5152,8 @@ entry:
; CHECK1: omp_region.body.split:
; CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK1-NEXT: br label [[OMP_REGION_END]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14
@ -5206,8 +5206,6 @@ entry:
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_RELOADED]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
@ -5243,6 +5241,8 @@ entry:
; CHECK1: omp_region.body.split:
; CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK1-NEXT: br label [[OMP_REGION_END]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..16
@ -5291,8 +5291,6 @@ entry:
; CHECK1-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
@ -5307,6 +5305,8 @@ entry:
; CHECK1-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
; CHECK1: omp.par.pre_finalize:
; CHECK1-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..18
@ -5368,8 +5368,6 @@ entry:
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CANCEL1_RELOADED]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
@ -5405,6 +5403,8 @@ entry:
; CHECK1: omp_region.body.split:
; CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK1-NEXT: br label [[OMP_REGION_END]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..20
@ -5461,8 +5461,6 @@ entry:
; CHECK1-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
@ -5480,6 +5478,8 @@ entry:
; CHECK1-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
; CHECK1: omp.par.pre_finalize:
; CHECK1-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..22
@ -5539,8 +5539,6 @@ entry:
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_RELOADED]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
@ -5599,6 +5597,8 @@ entry:
; CHECK1: omp_region.body.split:
; CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK1-NEXT: br label [[OMP_REGION_END]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..25
@ -5764,8 +5764,6 @@ entry:
; CHECK1-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
@ -5780,6 +5778,8 @@ entry:
; CHECK1-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
; CHECK1: omp.par.pre_finalize:
; CHECK1-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
; CHECK1: omp.par.outlined.exit.exitStub:
; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..37
@ -5832,8 +5832,6 @@ entry:
; CHECK2-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
@ -5848,6 +5846,8 @@ entry:
; CHECK2-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
; CHECK2: omp.par.pre_finalize:
; CHECK2-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
@ -5977,8 +5977,6 @@ entry:
; CHECK2-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
@ -6014,6 +6012,8 @@ entry:
; CHECK2: omp_region.body.split:
; CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK2-NEXT: br label [[OMP_REGION_END]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..8
@ -6061,8 +6061,6 @@ entry:
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TMP1:%.*]] = load float, float* [[F_RELOADED]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
@ -6097,6 +6095,8 @@ entry:
; CHECK2: omp_region.body.split:
; CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK2-NEXT: br label [[OMP_REGION_END]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10
@ -6146,8 +6146,6 @@ entry:
; CHECK2-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
@ -6186,6 +6184,8 @@ entry:
; CHECK2: omp_region.body.split:
; CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK2-NEXT: br label [[OMP_REGION_END]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..12
@ -6231,8 +6231,6 @@ entry:
; CHECK2-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
@ -6271,6 +6269,8 @@ entry:
; CHECK2: omp_region.body.split:
; CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK2-NEXT: br label [[OMP_REGION_END]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..14
@ -6323,8 +6323,6 @@ entry:
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_RELOADED]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
@ -6360,6 +6358,8 @@ entry:
; CHECK2: omp_region.body.split:
; CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK2-NEXT: br label [[OMP_REGION_END]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..16
@ -6408,8 +6408,6 @@ entry:
; CHECK2-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
@ -6424,6 +6422,8 @@ entry:
; CHECK2-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
; CHECK2: omp.par.pre_finalize:
; CHECK2-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..18
@ -6485,8 +6485,6 @@ entry:
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CANCEL1_RELOADED]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
@ -6522,6 +6520,8 @@ entry:
; CHECK2: omp_region.body.split:
; CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK2-NEXT: br label [[OMP_REGION_END]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..20
@ -6578,8 +6578,6 @@ entry:
; CHECK2-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
@ -6597,6 +6595,8 @@ entry:
; CHECK2-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
; CHECK2: omp.par.pre_finalize:
; CHECK2-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..22
@ -6656,8 +6656,6 @@ entry:
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_RELOADED]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
@ -6716,6 +6714,8 @@ entry:
; CHECK2: omp_region.body.split:
; CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK2-NEXT: br label [[OMP_REGION_END]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..25
@ -6881,8 +6881,6 @@ entry:
; CHECK2-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
@ -6897,6 +6895,8 @@ entry:
; CHECK2-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
; CHECK2: omp.par.pre_finalize:
; CHECK2-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
; CHECK2: omp.par.outlined.exit.exitStub:
; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..37

View File

@ -8,9 +8,6 @@
; CHECK: newFuncRoot:
; CHECK: br label %if.split
;
; CHECK: end.exitStub: ; preds = %end.split
; CHECK: ret void
;
; CHECK: then: ; preds = %if.split
; CHECK: %tmp12 = shl i32 %arg1, 2
; CHECK: %tmp13 = add nsw i32 %tmp12, %arg
@ -32,6 +29,9 @@
; CHECK: %tmp.0.ce = phi i32 [ %tmp13, %then ], [ %tmp25, %else ]
; CHECK: store i32 %tmp.0.ce, i32* %tmp.0.ce.out
; CHECK: br label %end.exitStub
;
; CHECK: end.exitStub: ; preds = %end.split
; CHECK: ret void
; CHECK: }
; The second extracted function is the region composed by the blocks
@ -40,12 +40,6 @@
; CHECK: newFuncRoot:
; CHECK: br label %bb14
;
; CHECK: bb26.exitStub: ; preds = %bb14
; CHECK: ret i1 true
;
; CHECK: bb30.exitStub: ; preds = %bb20
; CHECK: ret i1 false
;
; CHECK: bb14: ; preds = %newFuncRoot
; CHECK: %tmp0 = and i32 %arg1, %arg
; CHECK: %tmp1 = icmp slt i32 %tmp0, 0
@ -57,6 +51,12 @@
; CHECK: %tmp25 = add nsw i32 %tmp24, %tmp22
; CHECK: store i32 %tmp25, i32* %tmp25.out
; CHECK: br label %bb30.exitStub
;
; CHECK: bb26.exitStub: ; preds = %bb14
; CHECK: ret i1 true
;
; CHECK: bb30.exitStub: ; preds = %bb20
; CHECK: ret i1 false
; CHECK: }
define i32 @foo(i32 %arg, i32 %arg1) {