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[X86] Remove unnecessary RDRAND overrides from znver1/znver2 model 

Reported by D138359 - the overrides matched the base class schedule definition (its been flagged as WriteMicrocoded instead of WriteSystem but the models define both the same)
This commit is contained in:
Simon Pilgrim 2022-12-01 13:41:36 +00:00
parent a21bbc24d3
commit 2ab7c7e50a
2 changed files with 0 additions and 6 deletions
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3
llvm/lib/Target/X86/X86ScheduleZnver1.td
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@ -752,9 +752,6 @@ def : InstRW<[ZnWriteLEAVE], (instregex "LEAVE")>;
// PAUSE.
def : InstRW<[WriteMicrocoded], (instrs PAUSE)>;
// RDRAND.
def : InstRW<[WriteMicrocoded], (instrs RDRAND16r, RDRAND32r, RDRAND64r)>;
// XADD.
def ZnXADD : SchedWriteRes<[ZnALU]>;
def : InstRW<[ZnXADD], (instregex "XADD(8|16|32|64)rr")>;

3
llvm/lib/Target/X86/X86ScheduleZnver2.td
View File

@ -762,9 +762,6 @@ def : InstRW<[Zn2WriteLEAVE], (instregex "LEAVE")>;
// PAUSE.
def : InstRW<[WriteMicrocoded], (instrs PAUSE)>;
// RDRAND.
def : InstRW<[WriteMicrocoded], (instregex "RDRAND(16|32|64)r")>;
// XADD.
def Zn2XADD : SchedWriteRes<[Zn2ALU]>;
def : InstRW<[Zn2XADD], (instregex "XADD(8|16|32|64)rr")>;