From 250620f76e070cbbd4e8511f751f577b6e1633ac Mon Sep 17 00:00:00 2001 From: Arthur Eubanks Date: Thu, 24 Feb 2022 15:51:00 -0800 Subject: [PATCH] [OpaquePtr][AArch64] Use elementtype on ldxr/stxr Includes verifier changes checking the elementtype, clang codegen changes to emit the elementtype, and ISel changes using the elementtype. Reviewed By: #opaque-pointers, nikic Differential Revision: https://reviews.llvm.org/D120527 --- clang/lib/CodeGen/CGBuiltin.cpp | 18 +++-- clang/test/CodeGen/arm_acle.c | 4 +- clang/test/CodeGen/builtins-arm-exclusive.c | 64 +++++++++--------- .../CodeGenCXX/builtins-arm-exclusive.cpp | 4 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 16 ++++- llvm/lib/IR/Verifier.cpp | 13 +++- .../Target/AArch64/AArch64ISelLowering.cpp | 28 +++++--- llvm/test/Bitcode/upgrade-aarch64-ldstxr.bc | Bin 0 -> 1408 bytes llvm/test/Bitcode/upgrade-aarch64-ldstxr.ll | 19 ++++++ .../AArch64/GlobalISel/arm64-irtranslator.ll | 2 +- llvm/test/CodeGen/AArch64/arm64-ldxr-stxr.ll | 32 ++++----- llvm/test/CodeGen/AArch64/arm64_32-atomics.ll | 32 ++++----- .../AArch64/expand-atomicrmw-xchg-fp.ll | 12 ++-- .../AArch64/const-hoist-intrinsics.ll | 16 ++--- llvm/test/Verifier/aarch64-ldstxr.ll | 19 ++++++ 15 files changed, 175 insertions(+), 104 deletions(-) create mode 100644 llvm/test/Bitcode/upgrade-aarch64-ldstxr.bc create mode 100644 llvm/test/Bitcode/upgrade-aarch64-ldstxr.ll create mode 100644 llvm/test/Verifier/aarch64-ldstxr.ll diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index a2699f5b3ea1..6383dfdd8950 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -9684,23 +9684,26 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID, QualType Ty = E->getType(); llvm::Type *RealResTy = ConvertType(Ty); - llvm::Type *PtrTy = llvm::IntegerType::get( - getLLVMContext(), getContext().getTypeSize(Ty))->getPointerTo(); + llvm::Type *IntTy = + llvm::IntegerType::get(getLLVMContext(), getContext().getTypeSize(Ty)); + llvm::Type *PtrTy = IntTy->getPointerTo(); LoadAddr = Builder.CreateBitCast(LoadAddr, PtrTy); Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex ? Intrinsic::aarch64_ldaxr : Intrinsic::aarch64_ldxr, PtrTy); - Value *Val = Builder.CreateCall(F, LoadAddr, "ldxr"); + CallInst *Val = Builder.CreateCall(F, LoadAddr, "ldxr"); + Val->addParamAttr( + 0, Attribute::get(getLLVMContext(), Attribute::ElementType, IntTy)); if (RealResTy->isPointerTy()) return Builder.CreateIntToPtr(Val, RealResTy); llvm::Type *IntResTy = llvm::IntegerType::get( getLLVMContext(), CGM.getDataLayout().getTypeSizeInBits(RealResTy)); - Val = Builder.CreateTruncOrBitCast(Val, IntResTy); - return Builder.CreateBitCast(Val, RealResTy); + return Builder.CreateBitCast(Builder.CreateTruncOrBitCast(Val, IntResTy), + RealResTy); } if ((BuiltinID == AArch64::BI__builtin_arm_strex || @@ -9748,7 +9751,10 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID, ? Intrinsic::aarch64_stlxr : Intrinsic::aarch64_stxr, StoreAddr->getType()); - return Builder.CreateCall(F, {StoreVal, StoreAddr}, "stxr"); + CallInst *CI = Builder.CreateCall(F, {StoreVal, StoreAddr}, "stxr"); + CI->addParamAttr( + 1, Attribute::get(getLLVMContext(), Attribute::ElementType, StoreTy)); + return CI; } if (BuiltinID == AArch64::BI__getReg) { diff --git a/clang/test/CodeGen/arm_acle.c b/clang/test/CodeGen/arm_acle.c index 99c281633fc3..350aff581464 100644 --- a/clang/test/CodeGen/arm_acle.c +++ b/clang/test/CodeGen/arm_acle.c @@ -153,10 +153,10 @@ void test_dbg(void) { // AArch64-NEXT: [[TMP0:%.*]] = bitcast i8* [[P:%.*]] to i32* // AArch64-NEXT: br label [[DO_BODY_I:%.*]] // AArch64: do.body.i: -// AArch64-NEXT: [[LDXR_I:%.*]] = call i64 @llvm.aarch64.ldxr.p0i32(i32* [[TMP0]]) [[ATTR3]] +// AArch64-NEXT: [[LDXR_I:%.*]] = call i64 @llvm.aarch64.ldxr.p0i32(i32* elementtype(i32) [[TMP0]]) [[ATTR3]] // AArch64-NEXT: [[TMP1:%.*]] = trunc i64 [[LDXR_I]] to i32 // AArch64-NEXT: [[TMP2:%.*]] = zext i32 [[X:%.*]] to i64 -// AArch64-NEXT: [[STXR_I:%.*]] = call i32 @llvm.aarch64.stxr.p0i32(i64 [[TMP2]], i32* [[TMP0]]) [[ATTR3]] +// AArch64-NEXT: [[STXR_I:%.*]] = call i32 @llvm.aarch64.stxr.p0i32(i64 [[TMP2]], i32* elementtype(i32) [[TMP0]]) [[ATTR3]] // AArch64-NEXT: [[TOBOOL_I:%.*]] = icmp ne i32 [[STXR_I]], 0 // AArch64-NEXT: br i1 [[TOBOOL_I]], label [[DO_BODY_I]], label [[__SWP_EXIT:%.*]], [[LOOP6:!llvm.loop !.*]] // AArch64: __swp.exit: diff --git a/clang/test/CodeGen/builtins-arm-exclusive.c b/clang/test/CodeGen/builtins-arm-exclusive.c index c6cf231659ec..5abe888e50ae 100644 --- a/clang/test/CodeGen/builtins-arm-exclusive.c +++ b/clang/test/CodeGen/builtins-arm-exclusive.c @@ -13,7 +13,7 @@ int test_ldrex(char *addr, long long *addr64, float *addrfloat) { // CHECK: [[INTRES:%.*]] = call i32 @llvm.arm.ldrex.p0i8(i8* %addr) // CHECK: trunc i32 [[INTRES]] to i8 -// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i8(i8* %addr) +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i8(i8* elementtype(i8) %addr) // CHECK-ARM64: trunc i64 [[INTRES]] to i8 sum += __builtin_arm_ldrex((short *)addr); @@ -22,7 +22,7 @@ int test_ldrex(char *addr, long long *addr64, float *addrfloat) { // CHECK: trunc i32 [[INTRES]] to i16 // CHECK-ARM64: [[ADDR16:%.*]] = bitcast i8* %addr to i16* -// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i16(i16* [[ADDR16]]) +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i16(i16* elementtype(i16) [[ADDR16]]) // CHECK-ARM64: trunc i64 [[INTRES]] to i16 sum += __builtin_arm_ldrex((int *)addr); @@ -30,7 +30,7 @@ int test_ldrex(char *addr, long long *addr64, float *addrfloat) { // CHECK: call i32 @llvm.arm.ldrex.p0i32(i32* [[ADDR32]]) // CHECK-ARM64: [[ADDR32:%.*]] = bitcast i8* %addr to i32* -// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i32(i32* [[ADDR32]]) +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i32(i32* elementtype(i32) [[ADDR32]]) // CHECK-ARM64: trunc i64 [[INTRES]] to i32 sum += __builtin_arm_ldrex((long long *)addr); @@ -39,13 +39,13 @@ int test_ldrex(char *addr, long long *addr64, float *addrfloat) { // CHECK: call { i32, i32 } @llvm.arm.ldrexd(i8* [[TMP5]]) // CHECK-ARM64: [[ADDR64:%.*]] = bitcast i8* %addr to i64* -// CHECK-ARM64: call i64 @llvm.aarch64.ldxr.p0i64(i64* [[ADDR64]]) +// CHECK-ARM64: call i64 @llvm.aarch64.ldxr.p0i64(i64* elementtype(i64) [[ADDR64]]) sum += __builtin_arm_ldrex(addr64); // CHECK: [[ADDR64_AS8:%.*]] = bitcast i64* %addr64 to i8* // CHECK: call { i32, i32 } @llvm.arm.ldrexd(i8* [[ADDR64_AS8]]) -// CHECK-ARM64: call i64 @llvm.aarch64.ldxr.p0i64(i64* %addr64) +// CHECK-ARM64: call i64 @llvm.aarch64.ldxr.p0i64(i64* elementtype(i64) %addr64) sum += __builtin_arm_ldrex(addrfloat); // CHECK: [[INTADDR:%.*]] = bitcast float* %addrfloat to i32* @@ -53,7 +53,7 @@ int test_ldrex(char *addr, long long *addr64, float *addrfloat) { // CHECK: bitcast i32 [[INTRES]] to float // CHECK-ARM64: [[INTADDR:%.*]] = bitcast float* %addrfloat to i32* -// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i32(i32* [[INTADDR]]) +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i32(i32* elementtype(i32) [[INTADDR]]) // CHECK-ARM64: [[TRUNCRES:%.*]] = trunc i64 [[INTRES]] to i32 // CHECK-ARM64: bitcast i32 [[TRUNCRES]] to float @@ -71,7 +71,7 @@ int test_ldrex(char *addr, long long *addr64, float *addrfloat) { // CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to double* // CHECK-ARM64: [[TMP5:%.*]] = bitcast double* [[TMP4]] to i64* -// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i64(i64* [[TMP5]]) +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i64(i64* elementtype(i64) [[TMP5]]) // CHECK-ARM64: bitcast i64 [[INTRES]] to double sum += *__builtin_arm_ldrex((int **)addr); @@ -82,7 +82,7 @@ int test_ldrex(char *addr, long long *addr64, float *addrfloat) { // CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to i32** // CHECK-ARM64: [[TMP5:%.*]] = bitcast i32** [[TMP4]] to i64* -// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i64(i64* [[TMP5]]) +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i64(i64* elementtype(i64) [[TMP5]]) // CHECK-ARM64: inttoptr i64 [[INTRES]] to i32* sum += __builtin_arm_ldrex((struct Simple **)addr)->a; @@ -93,7 +93,7 @@ int test_ldrex(char *addr, long long *addr64, float *addrfloat) { // CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to %struct.Simple** // CHECK-ARM64: [[TMP5:%.*]] = bitcast %struct.Simple** [[TMP4]] to i64* -// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i64(i64* [[TMP5]]) +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i64(i64* elementtype(i64) [[TMP5]]) // CHECK-ARM64: inttoptr i64 [[INTRES]] to %struct.Simple* return sum; } @@ -106,7 +106,7 @@ int test_ldaex(char *addr, long long *addr64, float *addrfloat) { // CHECK: [[INTRES:%.*]] = call i32 @llvm.arm.ldaex.p0i8(i8* %addr) // CHECK: trunc i32 [[INTRES]] to i8 -// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i8(i8* %addr) +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i8(i8* elementtype(i8) %addr) // CHECK-ARM64: trunc i64 [[INTRES]] to i8 sum += __builtin_arm_ldaex((short *)addr); @@ -115,7 +115,7 @@ int test_ldaex(char *addr, long long *addr64, float *addrfloat) { // CHECK: trunc i32 [[INTRES]] to i16 // CHECK-ARM64: [[ADDR16:%.*]] = bitcast i8* %addr to i16* -// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i16(i16* [[ADDR16]]) +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i16(i16* elementtype(i16) [[ADDR16]]) // CHECK-ARM64: [[TRUNCRES:%.*]] = trunc i64 [[INTRES]] to i16 sum += __builtin_arm_ldaex((int *)addr); @@ -123,7 +123,7 @@ int test_ldaex(char *addr, long long *addr64, float *addrfloat) { // CHECK: call i32 @llvm.arm.ldaex.p0i32(i32* [[ADDR32]]) // CHECK-ARM64: [[ADDR32:%.*]] = bitcast i8* %addr to i32* -// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i32(i32* [[ADDR32]]) +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i32(i32* elementtype(i32) [[ADDR32]]) // CHECK-ARM64: trunc i64 [[INTRES]] to i32 sum += __builtin_arm_ldaex((long long *)addr); @@ -132,13 +132,13 @@ int test_ldaex(char *addr, long long *addr64, float *addrfloat) { // CHECK: call { i32, i32 } @llvm.arm.ldaexd(i8* [[TMP5]]) // CHECK-ARM64: [[ADDR64:%.*]] = bitcast i8* %addr to i64* -// CHECK-ARM64: call i64 @llvm.aarch64.ldaxr.p0i64(i64* [[ADDR64]]) +// CHECK-ARM64: call i64 @llvm.aarch64.ldaxr.p0i64(i64* elementtype(i64) [[ADDR64]]) sum += __builtin_arm_ldaex(addr64); // CHECK: [[ADDR64_AS8:%.*]] = bitcast i64* %addr64 to i8* // CHECK: call { i32, i32 } @llvm.arm.ldaexd(i8* [[ADDR64_AS8]]) -// CHECK-ARM64: call i64 @llvm.aarch64.ldaxr.p0i64(i64* %addr64) +// CHECK-ARM64: call i64 @llvm.aarch64.ldaxr.p0i64(i64* elementtype(i64) %addr64) sum += __builtin_arm_ldaex(addrfloat); // CHECK: [[INTADDR:%.*]] = bitcast float* %addrfloat to i32* @@ -146,7 +146,7 @@ int test_ldaex(char *addr, long long *addr64, float *addrfloat) { // CHECK: bitcast i32 [[INTRES]] to float // CHECK-ARM64: [[INTADDR:%.*]] = bitcast float* %addrfloat to i32* -// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i32(i32* [[INTADDR]]) +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i32(i32* elementtype(i32) [[INTADDR]]) // CHECK-ARM64: [[TRUNCRES:%.*]] = trunc i64 [[INTRES]] to i32 // CHECK-ARM64: bitcast i32 [[TRUNCRES]] to float @@ -164,7 +164,7 @@ int test_ldaex(char *addr, long long *addr64, float *addrfloat) { // CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to double* // CHECK-ARM64: [[TMP5:%.*]] = bitcast double* [[TMP4]] to i64* -// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i64(i64* [[TMP5]]) +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i64(i64* elementtype(i64) [[TMP5]]) // CHECK-ARM64: bitcast i64 [[INTRES]] to double sum += *__builtin_arm_ldaex((int **)addr); @@ -175,7 +175,7 @@ int test_ldaex(char *addr, long long *addr64, float *addrfloat) { // CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to i32** // CHECK-ARM64: [[TMP5:%.*]] = bitcast i32** [[TMP4]] to i64* -// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i64(i64* [[TMP5]]) +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i64(i64* elementtype(i64) [[TMP5]]) // CHECK-ARM64: inttoptr i64 [[INTRES]] to i32* sum += __builtin_arm_ldaex((struct Simple **)addr)->a; @@ -186,7 +186,7 @@ int test_ldaex(char *addr, long long *addr64, float *addrfloat) { // CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to %struct.Simple** // CHECK-ARM64: [[TMP5:%.*]] = bitcast %struct.Simple** [[TMP4]] to i64* -// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i64(i64* [[TMP5]]) +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i64(i64* elementtype(i64) [[TMP5]]) // CHECK-ARM64: inttoptr i64 [[INTRES]] to %struct.Simple* return sum; } @@ -199,21 +199,21 @@ int test_strex(char *addr) { res |= __builtin_arm_strex(4, addr); // CHECK: call i32 @llvm.arm.strex.p0i8(i32 4, i8* %addr) -// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i8(i64 4, i8* %addr) +// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i8(i64 4, i8* elementtype(i8) %addr) res |= __builtin_arm_strex(42, (short *)addr); // CHECK: [[ADDR16:%.*]] = bitcast i8* %addr to i16* // CHECK: call i32 @llvm.arm.strex.p0i16(i32 42, i16* [[ADDR16]]) // CHECK-ARM64: [[ADDR16:%.*]] = bitcast i8* %addr to i16* -// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i16(i64 42, i16* [[ADDR16]]) +// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i16(i64 42, i16* elementtype(i16) [[ADDR16]]) res |= __builtin_arm_strex(42, (int *)addr); // CHECK: [[ADDR32:%.*]] = bitcast i8* %addr to i32* // CHECK: call i32 @llvm.arm.strex.p0i32(i32 42, i32* [[ADDR32]]) // CHECK-ARM64: [[ADDR32:%.*]] = bitcast i8* %addr to i32* -// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i32(i64 42, i32* [[ADDR32]]) +// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i32(i64 42, i32* elementtype(i32) [[ADDR32]]) res |= __builtin_arm_strex(42, (long long *)addr); // CHECK: store i64 42, i64* [[TMP:%.*]], align 8 @@ -226,7 +226,7 @@ int test_strex(char *addr) { // CHECK: call i32 @llvm.arm.strexd(i32 [[LO]], i32 [[HI]], i8* [[TMP5]]) // CHECK-ARM64: [[ADDR64:%.*]] = bitcast i8* %addr to i64* -// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i64(i64 42, i64* [[ADDR64]]) +// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i64(i64 42, i64* elementtype(i64) [[ADDR64]]) res |= __builtin_arm_strex(2.71828f, (float *)addr); // CHECK: [[TMP4:%.*]] = bitcast i8* %addr to float* @@ -235,7 +235,7 @@ int test_strex(char *addr) { // CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to float* // CHECK-ARM64: [[TMP5:%.*]] = bitcast float* [[TMP4]] to i32* -// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i32(i64 1076754509, i32* [[TMP5]]) +// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i32(i64 1076754509, i32* elementtype(i32) [[TMP5]]) res |= __builtin_arm_strex(3.14159, (double *)addr); // CHECK: store double 3.141590e+00, double* [[TMP:%.*]], align 8 @@ -249,7 +249,7 @@ int test_strex(char *addr) { // CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to double* // CHECK-ARM64: [[TMP5:%.*]] = bitcast double* [[TMP4]] to i64* -// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i64(i64 4614256650576692846, i64* [[TMP5]]) +// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i64(i64 4614256650576692846, i64* elementtype(i64) [[TMP5]]) res |= __builtin_arm_strex(&var, (struct Simple **)addr); // CHECK: [[TMP4:%.*]] = bitcast i8* %addr to %struct.Simple** @@ -260,7 +260,7 @@ int test_strex(char *addr) { // CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to %struct.Simple** // CHECK-ARM64: [[TMP5:%.*]] = bitcast %struct.Simple** [[TMP4]] to i64* // CHECK-ARM64: [[INTVAL:%.*]] = ptrtoint %struct.Simple* %var to i64 -// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i64(i64 [[INTVAL]], i64* [[TMP5]]) +// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i64(i64 [[INTVAL]], i64* elementtype(i64) [[TMP5]]) return res; } @@ -273,21 +273,21 @@ int test_stlex(char *addr) { res |= __builtin_arm_stlex(4, addr); // CHECK: call i32 @llvm.arm.stlex.p0i8(i32 4, i8* %addr) -// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i8(i64 4, i8* %addr) +// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i8(i64 4, i8* elementtype(i8) %addr) res |= __builtin_arm_stlex(42, (short *)addr); // CHECK: [[ADDR16:%.*]] = bitcast i8* %addr to i16* // CHECK: call i32 @llvm.arm.stlex.p0i16(i32 42, i16* [[ADDR16]]) // CHECK-ARM64: [[ADDR16:%.*]] = bitcast i8* %addr to i16* -// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i16(i64 42, i16* [[ADDR16]]) +// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i16(i64 42, i16* elementtype(i16) [[ADDR16]]) res |= __builtin_arm_stlex(42, (int *)addr); // CHECK: [[ADDR32:%.*]] = bitcast i8* %addr to i32* // CHECK: call i32 @llvm.arm.stlex.p0i32(i32 42, i32* [[ADDR32]]) // CHECK-ARM64: [[ADDR32:%.*]] = bitcast i8* %addr to i32* -// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i32(i64 42, i32* [[ADDR32]]) +// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i32(i64 42, i32* elementtype(i32) [[ADDR32]]) res |= __builtin_arm_stlex(42, (long long *)addr); // CHECK: store i64 42, i64* [[TMP:%.*]], align 8 @@ -300,7 +300,7 @@ int test_stlex(char *addr) { // CHECK: call i32 @llvm.arm.stlexd(i32 [[LO]], i32 [[HI]], i8* [[TMP5]]) // CHECK-ARM64: [[ADDR64:%.*]] = bitcast i8* %addr to i64* -// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i64(i64 42, i64* [[ADDR64]]) +// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i64(i64 42, i64* elementtype(i64) [[ADDR64]]) res |= __builtin_arm_stlex(2.71828f, (float *)addr); // CHECK: [[TMP4:%.*]] = bitcast i8* %addr to float* @@ -309,7 +309,7 @@ int test_stlex(char *addr) { // CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to float* // CHECK-ARM64: [[TMP5:%.*]] = bitcast float* [[TMP4]] to i32* -// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i32(i64 1076754509, i32* [[TMP5]]) +// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i32(i64 1076754509, i32* elementtype(i32) [[TMP5]]) res |= __builtin_arm_stlex(3.14159, (double *)addr); // CHECK: store double 3.141590e+00, double* [[TMP:%.*]], align 8 @@ -323,7 +323,7 @@ int test_stlex(char *addr) { // CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to double* // CHECK-ARM64: [[TMP5:%.*]] = bitcast double* [[TMP4]] to i64* -// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i64(i64 4614256650576692846, i64* [[TMP5]]) +// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i64(i64 4614256650576692846, i64* elementtype(i64) [[TMP5]]) res |= __builtin_arm_stlex(&var, (struct Simple **)addr); // CHECK: [[TMP4:%.*]] = bitcast i8* %addr to %struct.Simple** @@ -334,7 +334,7 @@ int test_stlex(char *addr) { // CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to %struct.Simple** // CHECK-ARM64: [[TMP5:%.*]] = bitcast %struct.Simple** [[TMP4]] to i64* // CHECK-ARM64: [[INTVAL:%.*]] = ptrtoint %struct.Simple* %var to i64 -// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i64(i64 [[INTVAL]], i64* [[TMP5]]) +// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i64(i64 [[INTVAL]], i64* elementtype(i64) [[TMP5]]) return res; } diff --git a/clang/test/CodeGenCXX/builtins-arm-exclusive.cpp b/clang/test/CodeGenCXX/builtins-arm-exclusive.cpp index 06f7a023adec..05cb330a4dda 100644 --- a/clang/test/CodeGenCXX/builtins-arm-exclusive.cpp +++ b/clang/test/CodeGenCXX/builtins-arm-exclusive.cpp @@ -7,7 +7,7 @@ bool b; // CHECK: call i32 @llvm.arm.ldrex.p0i8(i8* @b) // CHECK-ARM64-LABEL: @_Z10test_ldrexv() -// CHECK-ARM64: call i64 @llvm.aarch64.ldxr.p0i8(i8* @b) +// CHECK-ARM64: call i64 @llvm.aarch64.ldxr.p0i8(i8* elementtype(i8) @b) void test_ldrex() { b = __builtin_arm_ldrex(&b); @@ -17,7 +17,7 @@ void test_ldrex() { // CHECK: %{{.*}} = call i32 @llvm.arm.strex.p0i8(i32 1, i8* @b) // CHECK-ARM64-LABEL: @_Z10tset_strexv() -// CHECK-ARM64: %{{.*}} = call i32 @llvm.aarch64.stxr.p0i8(i64 1, i8* @b) +// CHECK-ARM64: %{{.*}} = call i32 @llvm.aarch64.stxr.p0i8(i64 1, i8* elementtype(i8) @b) void tset_strex() { __builtin_arm_strex(true, &b); diff --git a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp index 5a667f55948f..3ad5fd7171db 100644 --- a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp +++ b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp @@ -51,6 +51,7 @@ #include "llvm/IR/Instruction.h" #include "llvm/IR/Instructions.h" #include "llvm/IR/Intrinsics.h" +#include "llvm/IR/IntrinsicsAArch64.h" #include "llvm/IR/LLVMContext.h" #include "llvm/IR/Metadata.h" #include "llvm/IR/Module.h" @@ -4140,14 +4141,23 @@ Error BitcodeReader::propagateAttributeTypes(CallBase *CB, switch (CB->getIntrinsicID()) { case Intrinsic::preserve_array_access_index: case Intrinsic::preserve_struct_access_index: - if (!Attrs.getParamElementType(0)) { - Type *ElTy = getPtrElementTypeByID(ArgTyIDs[0]); + case Intrinsic::aarch64_ldaxr: + case Intrinsic::aarch64_ldxr: + case Intrinsic::aarch64_stlxr: + case Intrinsic::aarch64_stxr: { + unsigned ArgNo = CB->getIntrinsicID() == Intrinsic::aarch64_stlxr || + CB->getIntrinsicID() == Intrinsic::aarch64_stxr + ? 1 + : 0; + if (!Attrs.getParamElementType(ArgNo)) { + Type *ElTy = getPtrElementTypeByID(ArgTyIDs[ArgNo]); if (!ElTy) return error("Missing element type for elementtype upgrade"); Attribute NewAttr = Attribute::get(Context, Attribute::ElementType, ElTy); - Attrs = Attrs.addParamAttribute(Context, 0, NewAttr); + Attrs = Attrs.addParamAttribute(Context, ArgNo, NewAttr); } break; + } default: break; } diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp index bc6f6757311f..632cc0af3846 100644 --- a/llvm/lib/IR/Verifier.cpp +++ b/llvm/lib/IR/Verifier.cpp @@ -84,6 +84,7 @@ #include "llvm/IR/Instructions.h" #include "llvm/IR/IntrinsicInst.h" #include "llvm/IR/Intrinsics.h" +#include "llvm/IR/IntrinsicsAArch64.h" #include "llvm/IR/IntrinsicsWebAssembly.h" #include "llvm/IR/LLVMContext.h" #include "llvm/IR/Metadata.h" @@ -5520,13 +5521,23 @@ void Verifier::visitIntrinsicCall(Intrinsic::ID ID, CallBase &Call) { break; } case Intrinsic::preserve_array_access_index: - case Intrinsic::preserve_struct_access_index: { + case Intrinsic::preserve_struct_access_index: + case Intrinsic::aarch64_ldaxr: + case Intrinsic::aarch64_ldxr: { Type *ElemTy = Call.getParamElementType(0); Assert(ElemTy, "Intrinsic requires elementtype attribute on first argument.", &Call); break; } + case Intrinsic::aarch64_stlxr: + case Intrinsic::aarch64_stxr: { + Type *ElemTy = Call.getAttributes().getParamElementType(1); + Assert(ElemTy, + "Intrinsic requires elementtype attribute on second argument.", + &Call); + break; + } }; } diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 6d2dfd89af29..0f2d7997c870 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -11984,23 +11984,23 @@ bool AArch64TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info, } case Intrinsic::aarch64_ldaxr: case Intrinsic::aarch64_ldxr: { - PointerType *PtrTy = cast(I.getArgOperand(0)->getType()); + Type *ValTy = I.getParamElementType(0); Info.opc = ISD::INTRINSIC_W_CHAIN; - Info.memVT = MVT::getVT(PtrTy->getPointerElementType()); + Info.memVT = MVT::getVT(ValTy); Info.ptrVal = I.getArgOperand(0); Info.offset = 0; - Info.align = DL.getABITypeAlign(PtrTy->getPointerElementType()); + Info.align = DL.getABITypeAlign(ValTy); Info.flags = MachineMemOperand::MOLoad | MachineMemOperand::MOVolatile; return true; } case Intrinsic::aarch64_stlxr: case Intrinsic::aarch64_stxr: { - PointerType *PtrTy = cast(I.getArgOperand(1)->getType()); + Type *ValTy = I.getParamElementType(1); Info.opc = ISD::INTRINSIC_W_CHAIN; - Info.memVT = MVT::getVT(PtrTy->getPointerElementType()); + Info.memVT = MVT::getVT(ValTy); Info.ptrVal = I.getArgOperand(1); Info.offset = 0; - Info.align = DL.getABITypeAlign(PtrTy->getPointerElementType()); + Info.align = DL.getABITypeAlign(ValTy); Info.flags = MachineMemOperand::MOStore | MachineMemOperand::MOVolatile; return true; } @@ -19265,7 +19265,10 @@ Value *AArch64TargetLowering::emitLoadLinked(IRBuilderBase &Builder, const DataLayout &DL = M->getDataLayout(); IntegerType *IntEltTy = Builder.getIntNTy(DL.getTypeSizeInBits(ValueTy)); - Value *Trunc = Builder.CreateTrunc(Builder.CreateCall(Ldxr, Addr), IntEltTy); + CallInst *CI = Builder.CreateCall(Ldxr, Addr); + CI->addParamAttr( + 0, Attribute::get(Builder.getContext(), Attribute::ElementType, ValueTy)); + Value *Trunc = Builder.CreateTrunc(CI, IntEltTy); return Builder.CreateBitCast(Trunc, ValueTy); } @@ -19306,10 +19309,13 @@ Value *AArch64TargetLowering::emitStoreConditional(IRBuilderBase &Builder, IntegerType *IntValTy = Builder.getIntNTy(DL.getTypeSizeInBits(Val->getType())); Val = Builder.CreateBitCast(Val, IntValTy); - return Builder.CreateCall(Stxr, - {Builder.CreateZExtOrBitCast( - Val, Stxr->getFunctionType()->getParamType(0)), - Addr}); + CallInst *CI = Builder.CreateCall( + Stxr, {Builder.CreateZExtOrBitCast( + Val, Stxr->getFunctionType()->getParamType(0)), + Addr}); + CI->addParamAttr(1, Attribute::get(Builder.getContext(), + Attribute::ElementType, Val->getType())); + return CI; } bool AArch64TargetLowering::functionArgumentNeedsConsecutiveRegisters( diff --git a/llvm/test/Bitcode/upgrade-aarch64-ldstxr.bc b/llvm/test/Bitcode/upgrade-aarch64-ldstxr.bc new file mode 100644 index 0000000000000000000000000000000000000000..3ac94f517c4a5fd78e6575315bca3f8a6deba3c3 GIT binary patch literal 1408 zcmZ`(Z)_7~7=PPad&em69Z*^8?&=-g!bCET4z%^!g!LvFim?bWGa0crmpZhNTWPj# z7`^_PH)21Ou}D9RgeH8^PcvBzAEw!Q6YFvzlNhtaWm#Q;X$qM#35g{7UI7!0KFRyM zcfWh?eV^y|{+>4|&MY6W17HCF^w{{OSKs_9a_Nt$*BVPr9VU+ja5ez;n*i8s=71T+ z>_7ugy3eJD2ek8jMBu{B!=r>pMc9))_z930ym%upV?mvFpN?+K1}%5$8%W1E_# z+Q-bjCE{~CD;^qUzcqP+8OQFH-MM}5Pj;VY=SpbZb1VQPnms#-O>EC0z&+QLr?_V1 zoV#ozS90NCZ#Uc2n+iKkc{jl7-O7T#RY`4qxujFg84P6!z)=SPb!cwPt^A1$pCQ4f zH4K2m2sZ+@rvP}GI|45>e7WVrkrUDTxq8BC{P@@u;CS6~(NuTv2>>V{?zXilfcP6R zhdV8JgZZB^pBN;Ex!8U4+S?1_Pjwwp62!BqPP74d7Zwm8Ir~MgB(AVt)Vf<_# z{z9J`LtatkoGOR$ffjt=fdwr)sHkrdYQIB`<<+5la?jm$cy|TA6bl>)8T z{E|e^bM#!2nU}0T*s^%RRy`z{guI)veK1>PUW5T3n`{tx7cd0Qs9q+>v zVKwehikjl^k3>NS0YxMOCmZ%+jo@*zUT)(Mw6!(h6NEGryQz5yw&Q zr1;`QTF^sHj|&N_g9$v5KYC;%M;Z*c-gV7O^cu%3&oUpFTt>nivo2YWkEFf2CQOO} zM99OUzak2w=vB*pU5_eN2T?u*KHP%G^2zR13RY*}%@DlDyJv5-yDH^|#WJ&u66kaa zlj*=zx-p}9v!YMe{8wjvB@NZ+*E^^B2^?kBj|l8ioj+cK)i8Ny#k$UtH+k|VOWqH` z(-d6gA$q;HV*PmqRzmOr@BXPO(ZwXQSZ=6t%q@;Yuqyt_L49y2Cibh@w89x znntIOiXBFIcB+Fi4#1~K-_1y4o9kmO=&#c<7QRH1Cv2xRMTxYv%WmsOY6Ky~NTL z$?$7QS5cxD3UujF^3tq{++fLah(vlen&CSN0Heon-G3!5OdvsEfy-$>5=TxmdQxHm zcnZzi>)Q9A&|04!cLU(IT0klsb`(dGCWUpdBYf6j2Sh5_Pr0pD^ht4a6v_u{ch?(~ ze}DoXQN$-K_~Kb2wFRwXSU(GZ(SIID?aY9JafQ|F1iIH)^t25d|J48@(dfXbR!NGz z-S_&1 | FileCheck %s + +define void @f(i32* %p) { +; CHECK: Intrinsic requires elementtype attribute on first argument + %a = call i64 @llvm.aarch64.ldxr.p0i32(i32* %p) +; CHECK: Intrinsic requires elementtype attribute on second argument + %c = call i32 @llvm.aarch64.stxr.p0i32(i64 0, i32* %p) + +; CHECK: Intrinsic requires elementtype attribute on first argument + %a2 = call i64 @llvm.aarch64.ldaxr.p0i32(i32* %p) +; CHECK: Intrinsic requires elementtype attribute on second argument + %c2 = call i32 @llvm.aarch64.stlxr.p0i32(i64 0, i32* %p) + ret void +} + +declare i64 @llvm.aarch64.ldxr.p0i32(i32*) +declare i64 @llvm.aarch64.ldaxr.p0i32(i32*) +declare i32 @llvm.aarch64.stxr.p0i32(i64, i32*) +declare i32 @llvm.aarch64.stlxr.p0i32(i64, i32*)