[BOLT] Add support for GOTPCRELX relocations
The linker can convert instructions with GOTPCRELX relocations into a form that uses an absolute addressing with an immediate. BOLT needs to recognize such conversions and symbolize the immediates. Reviewed By: rafauler Differential Revision: https://reviews.llvm.org/D126747
This commit is contained in:
Maksim Panchenko
parent
ffe86e3bdd
commit
1817642684
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@ -842,6 +842,20 @@ public:
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return (RI == Relocations.end()) ? nullptr : &RI->second;
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}
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/// Return the first relocation in the function that starts at an address in
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/// the [StartOffset, EndOffset) range. Return nullptr if no such relocation
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/// exists.
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const Relocation *getRelocationInRange(uint64_t StartOffset,
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uint64_t EndOffset) const {
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assert(CurrentState == State::Empty &&
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"Relocations unavailable in the current function state.");
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auto RI = Relocations.lower_bound(StartOffset);
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if (RI != Relocations.end() && RI->first < EndOffset)
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return &RI->second;
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return nullptr;
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}
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/// Returns the raw binary encoding of this function.
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ErrorOr<ArrayRef<uint8_t>> getData() const;
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@ -1314,11 +1328,11 @@ public:
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case ELF::R_X86_64_PC8:
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case ELF::R_X86_64_PC32:
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case ELF::R_X86_64_PC64:
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case ELF::R_X86_64_GOTPCRELX:
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case ELF::R_X86_64_REX_GOTPCRELX:
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Relocations[Offset] = Relocation{Offset, Symbol, RelType, Addend, Value};
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return;
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case ELF::R_X86_64_PLT32:
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case ELF::R_X86_64_GOTPCRELX:
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case ELF::R_X86_64_REX_GOTPCRELX:
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case ELF::R_X86_64_GOTPCREL:
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case ELF::R_X86_64_TPOFF32:
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case ELF::R_X86_64_GOTTPOFF:
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@ -77,6 +77,9 @@ struct Relocation {
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/// Return true if relocation type implies the creation of a GOT entry
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static bool isGOT(uint64_t Type);
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/// Special relocation type that allows the linker to modify the instruction.
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static bool isX86GOTPCRELX(uint64_t Type);
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/// Return true if relocation type is NONE
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static bool isNone(uint64_t Type);
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@ -562,6 +562,12 @@ bool Relocation::isGOT(uint64_t Type) {
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return isGOTX86(Type);
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}
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bool Relocation::isX86GOTPCRELX(uint64_t Type) {
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if (Arch != Triple::x86_64)
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return false;
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return Type == ELF::R_X86_64_GOTPCRELX || Type == ELF::R_X86_64_REX_GOTPCRELX;
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}
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bool Relocation::isNone(uint64_t Type) { return Type == getNone(); }
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bool Relocation::isRelative(uint64_t Type) {
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@ -47,54 +47,88 @@ bool X86MCSymbolizer::tryAddingSymbolicOperand(
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Inst.addOperand(MCOperand::createExpr(Expr));
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};
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// Check for relocations against the operand.
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// Check if the operand being added is a displacement part of a compound
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// memory operand that uses PC-relative addressing. If it is, try to symbolize
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// it without relocations. Return true on success, false otherwise.
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auto processPCRelOperandNoRel = [&]() {
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const int MemOp = BC.MIB->getMemoryOperandNo(Inst);
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if (MemOp == -1)
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return false;
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const unsigned DispOp = MemOp + X86::AddrDisp;
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if (Inst.getNumOperands() != DispOp)
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return false;
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const MCOperand &Base = Inst.getOperand(MemOp + X86::AddrBaseReg);
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if (Base.getReg() != BC.MRI->getProgramCounter())
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return false;
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const MCOperand &Scale = Inst.getOperand(MemOp + X86::AddrScaleAmt);
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const MCOperand &Index = Inst.getOperand(MemOp + X86::AddrIndexReg);
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if (Scale.getImm() != 0 && Index.getReg() != MCRegister::NoRegister)
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return false;
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const MCSymbol *TargetSymbol;
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uint64_t TargetOffset;
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std::tie(TargetSymbol, TargetOffset) =
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BC.handleAddressRef(Value, Function, /*IsPCRel=*/true);
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addOperand(TargetSymbol, TargetOffset);
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return true;
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};
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// Check for GOTPCRELX relocations first. Because these relocations allow the
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// linker to modify the instruction, we have to check the offset range
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// corresponding to the instruction, not the offset of the operand.
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// Note that if there is GOTPCRELX relocation against the instruction, there
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// will be no other relocation in this range, since GOTPCRELX applies only to
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// certain instruction types.
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const uint64_t InstOffset = InstAddress - Function.getAddress();
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if (const Relocation *Relocation =
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Function.getRelocationAt(InstOffset + ImmOffset)) {
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uint64_t SymbolValue = Relocation->Value - Relocation->Addend;
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if (Relocation->isPCRelative())
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SymbolValue += InstAddress + ImmOffset;
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const Relocation *Relocation =
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Function.getRelocationInRange(InstOffset, InstOffset + InstSize);
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if (Relocation && Relocation::isX86GOTPCRELX(Relocation->Type)) {
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// If the operand is PC-relative, convert it without using the relocation
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// information. For GOTPCRELX, it is safe to use the absolute address
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// instead of extracting the addend from the relocation, as non-standard
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// forms will be rejected by linker conversion process and the operand
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// will always reference GOT which we don't rewrite.
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if (processPCRelOperandNoRel())
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return true;
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// Process reference to the symbol.
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BC.handleAddressRef(SymbolValue, Function, Relocation->isPCRelative());
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// The linker converted the PC-relative address to an absolute one.
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// Symbolize this address.
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BC.handleAddressRef(Value, Function, /*IsPCRel=*/false);
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const BinaryData *Target = BC.getBinaryDataAtAddress(Value);
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assert(Target &&
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"BinaryData should exist at converted GOTPCRELX destination");
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uint64_t Addend = Relocation->Addend;
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// Real addend for pc-relative targets is adjusted with a delta from
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// the relocation placement to the next instruction.
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if (Relocation->isPCRelative())
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Addend += InstOffset + InstSize - Relocation->Offset;
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addOperand(Relocation->Symbol, Addend);
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addOperand(Target->getSymbol(), /*Addend=*/0);
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return true;
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}
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// Check if the operand being added is a displacement part of a compound
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// memory operand that uses PC-relative addressing. If it is, try to symbolize
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// it without relocations.
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const int MemOp = BC.MIB->getMemoryOperandNo(Inst);
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if (MemOp == -1)
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return false;
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// Check for relocations against the operand.
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if (!Relocation || Relocation->Offset != InstOffset + ImmOffset)
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Relocation = Function.getRelocationAt(InstOffset + ImmOffset);
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const unsigned DispOp = MemOp + X86::AddrDisp;
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if (Inst.getNumOperands() != DispOp)
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return false;
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if (!Relocation)
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return processPCRelOperandNoRel();
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const MCOperand &Base = Inst.getOperand(MemOp + X86::AddrBaseReg);
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if (Base.getReg() != BC.MRI->getProgramCounter())
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return false;
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uint64_t SymbolValue = Relocation->Value - Relocation->Addend;
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if (Relocation->isPCRelative())
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SymbolValue += InstAddress + ImmOffset;
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const MCOperand &Scale = Inst.getOperand(MemOp + X86::AddrScaleAmt);
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const MCOperand &Index = Inst.getOperand(MemOp + X86::AddrIndexReg);
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if (Scale.getImm() != 0 && Index.getReg() != MCRegister::NoRegister)
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return false;
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// Process reference to the symbol.
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BC.handleAddressRef(SymbolValue, Function, Relocation->isPCRelative());
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const MCSymbol *TargetSymbol;
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uint64_t TargetOffset;
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std::tie(TargetSymbol, TargetOffset) =
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BC.handleAddressRef(Value, Function, /*IsPCRel*/ true);
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uint64_t Addend = Relocation->Addend;
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// Real addend for pc-relative targets is adjusted with a delta from
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// the relocation placement to the next instruction.
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if (Relocation->isPCRelative())
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Addend += InstOffset + InstSize - Relocation->Offset;
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addOperand(TargetSymbol, TargetOffset);
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addOperand(Relocation->Symbol, Addend);
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return true;
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}
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@ -1,46 +1,69 @@
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# This reproduces a bug with misinterpreting the gotpcrelx reloc
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# Here we use llvm-mc -relax-relocations to produce R_X86_64_REX_GOTPCRELX
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# and ld.lld to consume it and optimize it, transforming a CMP <mem, reg>
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# into CMP <imm, reg>.
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# Then we check that BOLT updates correctly the imm operand that references
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# a function address. Currently XFAIL as we do not support it.
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# REQUIRES: system-linux
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# XFAIL: *
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## Check that BOLT correctly handles different types of instructions with
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## R_X86_64_GOTPCRELX or R_X86_64_REX_GOTPCRELX relocations and different
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## kinds of handling of the relocation by the linker (no relaxation, pic, and
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## non-pic).
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# RUN: llvm-mc -filetype=obj -triple x86_64-unknown-linux \
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# RUN: -relax-relocations %s -o %t.o
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# RUN: llvm-strip --strip-unneeded %t.o
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# RUN: ld.lld %t.o -o %t.exe -q
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# RUN: llvm-readobj -r %t.exe | FileCheck --check-prefix=READOBJ %s
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# RUN: llvm-bolt %t.exe -relocs -o %t.out -lite=0
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# RUN: ld.lld %t.o -o %t.pie.exe -q -pie
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# RUN: ld.lld %t.o -o %t.no-relax.exe -q --no-relax
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# RUN: llvm-bolt %t.exe -relocs -o %t.out -print-cfg -print-only=_start \
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# RUN: |& FileCheck --check-prefix=BOLT %s
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# RUN: llvm-bolt %t.pie.exe -o /dev/null -print-cfg -print-only=_start \
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# RUN: |& FileCheck --check-prefix=PIE-BOLT %s
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# RUN: llvm-bolt %t.no-relax.exe -o /dev/null -print-cfg -print-only=_start \
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# RUN: |& FileCheck --check-prefix=NO-RELAX-BOLT %s
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# RUN: llvm-objdump -d --no-show-raw-insn --print-imm-hex \
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# RUN: %t.out | FileCheck --check-prefix=DISASM %s
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# Check that R_X86_64_REX_GOTPCRELX is present in the input binary
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# READOBJ: 0x[[#%X,]] R_X86_64_REX_GOTPCRELX foo 0x[[#%X,]]
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# DISASM: Disassembly of section .text:
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# DISASM-EMPTY:
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# DISASM-NEXT: <_start>:
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# DISASM-NEXT: leaq 0x[[#%x,ADDR:]], %rax
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# DISASM-NEXT: cmpq 0x[[#ADDR]], %rax
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.text
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.globl _start
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.type _start, %function
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_start:
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.cfi_startproc
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leaq foo, %rax
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cmpq foo@GOTPCREL(%rip), %rax
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je b
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c:
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mov $1, %rdi
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callq foo
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b:
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xorq %rdi, %rdi
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callq foo
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# DISASM: Disassembly of section .text:
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# DISASM-EMPTY:
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# DISASM-NEXT: <_start>:
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call *foo@GOTPCREL(%rip)
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# NO-RELAX-BOLT: callq *{{.*}}(%rip)
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# BOLT: callq foo
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# PIE-BOLT: callq foo
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# DISASM-NEXT: callq 0x[[#%x,ADDR:]]
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movq foo@GOTPCREL(%rip), %rdi
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# NO-RELAX-BOLT-NEXT: movq {{.*}}(%rip), %rdi
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# BOLT-NEXT: leaq foo(%rip), %rdi
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# PIE-BOLT-NEXT: leaq foo(%rip), %rdi
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# DISASM-NEXT: leaq {{.*}}(%rip), %rdi # 0x[[#ADDR]]
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movl foo@GOTPCREL+4(%rip), %edi
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# NO-RELAX-BOLT-NEXT: movl {{.*}}(%rip), %edi
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# BOLT-NEXT: movl {{.*}}(%rip), %edi
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# PIE-BOLT-NEXT: movl {{.*}}(%rip), %edi
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# DISASM-NEXT: movl {{.*}}(%rip), %edi
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test %rdi, foo@GOTPCREL(%rip)
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# NO-RELAX-BOLT-NEXT: testq %rdi, DATA{{.*}}(%rip)
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# BOLT-NEXT: testq $foo, %rdi
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# PIE-BOLT-NEXT: testq %rdi, DATA{{.*}}(%rip)
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# DISASM-NEXT: testq $0x[[#ADDR]], %rdi
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cmpq foo@GOTPCREL(%rip), %rax
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# NO-RELAX-BOLT-NEXT: cmpq DATA{{.*}}(%rip), %rax
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# BOLT-NEXT: cmpq $foo, %rax
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# PIE-BOLT-NEXT: cmpq DATA{{.*}}(%rip), %rax
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# DISASM-NEXT: cmpq $0x[[#ADDR]], %rax
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jmp *foo@GOTPCREL(%rip)
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# NO-RELAX-BOLT-NEXT: jmpq *DATA{{.*}}(%rip)
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# BOLT-NEXT: jmp foo
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# PIE-BOLT-NEXT: jmp foo
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# DISASM-NEXT: jmp 0x[[#ADDR]]
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ret
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.cfi_endproc
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.size _start, .-_start
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