Rerun ./utils/update_cc_test.py on a bunch of tests
Due to update script changes; this reduces the size of a later "real" diff.
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1586075a00
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@ -590,7 +590,7 @@ int main(int argc, char **argv) {
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// CHECK1-NEXT: [[TMP36:%.*]] = sdiv exact i64 [[TMP35]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
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// CHECK1-NEXT: [[TMP37:%.*]] = add nuw i64 [[TMP36]], 1
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// CHECK1-NEXT: [[TMP38:%.*]] = mul nuw i64 [[TMP37]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
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// CHECK1-NEXT: store i64 [[TMP37]], i64* @{{reduction_size[.].+[.]}}, align 8
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// CHECK1-NEXT: store i64 [[TMP37]], i64* @{{reduction_size[.].+[.]}}, align 8, !noalias !12
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// CHECK1-NEXT: [[TMP39:%.*]] = load i8*, i8** [[TMP16]], align 8
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// CHECK1-NEXT: [[TMP40:%.*]] = call i8* @__kmpc_task_reduction_get_th_data(i32 [[TMP20]], i8* [[TMP39]], i8* [[TMP25]]) #[[ATTR5]]
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// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2
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@ -499,7 +499,7 @@ int main(int argc, char **argv) {
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// CHECK1-NEXT: [[TMP36:%.*]] = sdiv exact i64 [[TMP35]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
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// CHECK1-NEXT: [[TMP37:%.*]] = add nuw i64 [[TMP36]], 1
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// CHECK1-NEXT: [[TMP38:%.*]] = mul nuw i64 [[TMP37]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
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// CHECK1-NEXT: store i64 [[TMP37]], i64* @{{reduction_size[.].+[.]}}, align 8
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// CHECK1-NEXT: store i64 [[TMP37]], i64* @{{reduction_size[.].+[.]}}, align 8, !noalias !12
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// CHECK1-NEXT: [[TMP39:%.*]] = load i8*, i8** [[TMP16]], align 8
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// CHECK1-NEXT: [[TMP40:%.*]] = call i8* @__kmpc_task_reduction_get_th_data(i32 [[TMP20]], i8* [[TMP39]], i8* [[TMP25]]) #[[ATTR5]]
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// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2
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@ -494,7 +494,7 @@ int main(int argc, char **argv) {
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// CHECK1-NEXT: [[TMP36:%.*]] = sdiv exact i64 [[TMP35]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
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// CHECK1-NEXT: [[TMP37:%.*]] = add nuw i64 [[TMP36]], 1
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// CHECK1-NEXT: [[TMP38:%.*]] = mul nuw i64 [[TMP37]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
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// CHECK1-NEXT: store i64 [[TMP37]], i64* @{{reduction_size[.].+[.]}}, align 8
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// CHECK1-NEXT: store i64 [[TMP37]], i64* @{{reduction_size[.].+[.]}}, align 8, !noalias !12
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// CHECK1-NEXT: [[TMP39:%.*]] = load i8*, i8** [[TMP16]], align 8
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// CHECK1-NEXT: [[TMP40:%.*]] = call i8* @__kmpc_task_reduction_get_th_data(i32 [[TMP20]], i8* [[TMP39]], i8* [[TMP25]]) #[[ATTR5]]
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// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2
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@ -465,25 +465,25 @@ void loop() {
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// CHECK1-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14
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// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
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// CHECK1: omp.inner.for.cond.i:
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// CHECK1-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
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// CHECK1-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15:![0-9]+]]
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// CHECK1-NEXT: [[CONV5_I:%.*]] = sext i32 [[TMP46]] to i64
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// CHECK1-NEXT: [[TMP47:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !14, !llvm.access.group !15
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// CHECK1-NEXT: [[TMP47:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !14, !llvm.access.group [[ACC_GRP15]]
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// CHECK1-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV5_I]], [[TMP47]]
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// CHECK1-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
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// CHECK1: omp.inner.for.body.i:
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// CHECK1-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
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// CHECK1-NEXT: store i32 [[TMP48]], i32* [[I_I]], align 4, !noalias !14, !llvm.access.group !15
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// CHECK1-NEXT: [[TMP49:%.*]] = load i32, i32* [[TMP41]], align 4, !llvm.access.group !15
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// CHECK1-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
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// CHECK1-NEXT: store i32 [[TMP48]], i32* [[I_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
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// CHECK1-NEXT: [[TMP49:%.*]] = load i32, i32* [[TMP41]], align 4, !llvm.access.group [[ACC_GRP15]]
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// CHECK1-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP43]], i64 0, i64 0
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// CHECK1-NEXT: store i32 [[TMP49]], i32* [[ARRAYIDX_I]], align 4, !llvm.access.group !15
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// CHECK1-NEXT: store i32 [[TMP49]], i32* [[ARRAYIDX_I]], align 4, !llvm.access.group [[ACC_GRP15]]
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// CHECK1-NEXT: [[ARRAYIDX6_I:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP42]], i64 0, i64 0
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// CHECK1-NEXT: [[TMP50:%.*]] = bitcast %struct.S* [[ARRAYIDX6_I]] to i8*
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// CHECK1-NEXT: [[TMP51:%.*]] = bitcast %struct.S* [[TMP40]] to i8*
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// CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP50]], i8* align 8 [[TMP51]], i64 8, i1 false) #[[ATTR4]], !llvm.access.group !15
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// CHECK1-NEXT: store i32 33, i32* [[TMP44]], align 4, !llvm.access.group !15
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// CHECK1-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
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// CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP50]], i8* align 8 [[TMP51]], i64 8, i1 false) #[[ATTR4]], !llvm.access.group [[ACC_GRP15]]
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// CHECK1-NEXT: store i32 33, i32* [[TMP44]], align 4, !llvm.access.group [[ACC_GRP15]]
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// CHECK1-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
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// CHECK1-NEXT: [[ADD7_I:%.*]] = add nsw i32 [[TMP52]], 1
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// CHECK1-NEXT: store i32 [[ADD7_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
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// CHECK1-NEXT: store i32 [[ADD7_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
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// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP16:![0-9]+]]
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// CHECK1: omp.inner.for.end.i:
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// CHECK1-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTLITER__ADDR_I]], align 4, !noalias !14
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@ -877,24 +877,24 @@ void loop() {
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// CHECK1-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !32
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// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
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// CHECK1: omp.inner.for.cond.i:
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// CHECK1-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !32, !llvm.access.group !33
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// CHECK1-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !32, !llvm.access.group [[ACC_GRP33:![0-9]+]]
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// CHECK1-NEXT: [[CONV4_I:%.*]] = sext i32 [[TMP43]] to i64
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// CHECK1-NEXT: [[TMP44:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !32, !llvm.access.group !33
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// CHECK1-NEXT: [[TMP44:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !32, !llvm.access.group [[ACC_GRP33]]
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// CHECK1-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV4_I]], [[TMP44]]
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// CHECK1-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
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// CHECK1: omp.inner.for.body.i:
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// CHECK1-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !32, !llvm.access.group !33
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// CHECK1-NEXT: store i32 [[TMP45]], i32* [[I_I]], align 4, !noalias !32, !llvm.access.group !33
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// CHECK1-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP38]], align 128, !llvm.access.group !33
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// CHECK1-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !32, !llvm.access.group [[ACC_GRP33]]
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// CHECK1-NEXT: store i32 [[TMP45]], i32* [[I_I]], align 4, !noalias !32, !llvm.access.group [[ACC_GRP33]]
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// CHECK1-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP38]], align 128, !llvm.access.group [[ACC_GRP33]]
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// CHECK1-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP39]], i64 0, i64 0
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// CHECK1-NEXT: store i32 [[TMP46]], i32* [[ARRAYIDX_I]], align 4, !llvm.access.group !33
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// CHECK1-NEXT: store i32 [[TMP46]], i32* [[ARRAYIDX_I]], align 4, !llvm.access.group [[ACC_GRP33]]
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// CHECK1-NEXT: [[ARRAYIDX5_I:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP40]], i64 0, i64 0
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// CHECK1-NEXT: [[TMP47:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5_I]] to i8*
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// CHECK1-NEXT: [[TMP48:%.*]] = bitcast %struct.S.0* [[TMP41]] to i8*
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// CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP47]], i8* align 4 [[TMP48]], i64 4, i1 false) #[[ATTR4]], !llvm.access.group !33
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// CHECK1-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !32, !llvm.access.group !33
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// CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP47]], i8* align 4 [[TMP48]], i64 4, i1 false) #[[ATTR4]], !llvm.access.group [[ACC_GRP33]]
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// CHECK1-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !32, !llvm.access.group [[ACC_GRP33]]
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// CHECK1-NEXT: [[ADD6_I:%.*]] = add nsw i32 [[TMP49]], 1
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// CHECK1-NEXT: store i32 [[ADD6_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !32, !llvm.access.group !33
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// CHECK1-NEXT: store i32 [[ADD6_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !32, !llvm.access.group [[ACC_GRP33]]
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// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP34:![0-9]+]]
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// CHECK1: omp.inner.for.end.i:
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// CHECK1-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTLITER__ADDR_I]], align 4, !noalias !32
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@ -1181,24 +1181,24 @@ void loop() {
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// CHECK3-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14
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// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
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// CHECK3: omp.inner.for.cond.i:
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// CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
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// CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15:![0-9]+]]
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// CHECK3-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP33]] to i64
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// CHECK3-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !14, !llvm.access.group !15
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// CHECK3-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !14, !llvm.access.group [[ACC_GRP15]]
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// CHECK3-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP34]]
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// CHECK3-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
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// CHECK3: omp.inner.for.body.i:
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// CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
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// CHECK3-NEXT: store i32 [[TMP35]], i32* [[I_I]], align 4, !noalias !14, !llvm.access.group !15
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// CHECK3-NEXT: store double 1.000000e+00, double* [[TMP30]], align 8, !llvm.access.group !15
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// CHECK3-NEXT: store i32 11, i32* [[TMP31]], align 4, !llvm.access.group !15
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// CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
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// CHECK3-NEXT: store i32 [[TMP35]], i32* [[I_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
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// CHECK3-NEXT: store double 1.000000e+00, double* [[TMP30]], align 8, !llvm.access.group [[ACC_GRP15]]
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// CHECK3-NEXT: store i32 11, i32* [[TMP31]], align 4, !llvm.access.group [[ACC_GRP15]]
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// CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP_I]], i32 0, i32 0
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// CHECK3-NEXT: store double* [[TMP30]], double** [[TMP36]], align 8, !noalias !14, !llvm.access.group !15
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// CHECK3-NEXT: store double* [[TMP30]], double** [[TMP36]], align 8, !noalias !14, !llvm.access.group [[ACC_GRP15]]
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// CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP_I]], i32 0, i32 1
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// CHECK3-NEXT: store i32* [[TMP31]], i32** [[TMP37]], align 8, !noalias !14, !llvm.access.group !15
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// CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(16) [[REF_TMP_I]]) #[[ATTR3]], !llvm.access.group !15
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// CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
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// CHECK3-NEXT: store i32* [[TMP31]], i32** [[TMP37]], align 8, !noalias !14, !llvm.access.group [[ACC_GRP15]]
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// CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(16) [[REF_TMP_I]]) #[[ATTR3]], !llvm.access.group [[ACC_GRP15]]
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// CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
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// CHECK3-NEXT: [[ADD3_I:%.*]] = add nsw i32 [[TMP38]], 1
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// CHECK3-NEXT: store i32 [[ADD3_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
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// CHECK3-NEXT: store i32 [[ADD3_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
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// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP16:![0-9]+]]
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// CHECK3: omp.inner.for.end.i:
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// CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTLITER__ADDR_I]], align 4, !noalias !14
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@ -1410,42 +1410,42 @@ void loop() {
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// CHECK4-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14
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// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
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// CHECK4: omp.inner.for.cond.i:
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// CHECK4-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
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// CHECK4-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15:![0-9]+]]
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// CHECK4-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP33]] to i64
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// CHECK4-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !14, !llvm.access.group !15
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// CHECK4-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !14, !llvm.access.group [[ACC_GRP15]]
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// CHECK4-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP34]]
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// CHECK4-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
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// CHECK4: omp.inner.for.body.i:
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// CHECK4-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
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// CHECK4-NEXT: store i32 [[TMP35]], i32* [[I_I]], align 4, !noalias !14, !llvm.access.group !15
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// CHECK4-NEXT: store double 1.000000e+00, double* [[TMP30]], align 8, !llvm.access.group !15
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// CHECK4-NEXT: store i32 11, i32* [[TMP31]], align 4, !llvm.access.group !15
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// CHECK4-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
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// CHECK4-NEXT: store i32 [[TMP35]], i32* [[I_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
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// CHECK4-NEXT: store double 1.000000e+00, double* [[TMP30]], align 8, !llvm.access.group [[ACC_GRP15]]
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// CHECK4-NEXT: store i32 11, i32* [[TMP31]], align 4, !llvm.access.group [[ACC_GRP15]]
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// CHECK4-NEXT: [[BLOCK_ISA_I:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>* [[BLOCK_I]], i32 0, i32 0
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// CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA_I]], align 8, !noalias !14, !llvm.access.group !15
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// CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA_I]], align 8, !noalias !14, !llvm.access.group [[ACC_GRP15]]
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// CHECK4-NEXT: [[BLOCK_FLAGS_I:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>* [[BLOCK_I]], i32 0, i32 1
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// CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS_I]], align 8, !noalias !14, !llvm.access.group !15
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// CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS_I]], align 8, !noalias !14, !llvm.access.group [[ACC_GRP15]]
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// CHECK4-NEXT: [[BLOCK_RESERVED_I:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>* [[BLOCK_I]], i32 0, i32 2
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// CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED_I]], align 4, !noalias !14, !llvm.access.group !15
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// CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK4-NEXT: [[BLOCK_INVOKE_I:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>* [[BLOCK_I]], i32 0, i32 3
|
||||
// CHECK4-NEXT: store i8* bitcast (void (i8*)* @_block_invoke to i8*), i8** [[BLOCK_INVOKE_I]], align 8, !noalias !14, !llvm.access.group !15
|
||||
// CHECK4-NEXT: store i8* bitcast (void (i8*)* @_block_invoke to i8*), i8** [[BLOCK_INVOKE_I]], align 8, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK4-NEXT: [[BLOCK_DESCRIPTOR_I:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>* [[BLOCK_I]], i32 0, i32 4
|
||||
// CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.2 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR_I]], align 8, !noalias !14, !llvm.access.group !15
|
||||
// CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.2 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR_I]], align 8, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK4-NEXT: [[BLOCK_CAPTURED_I:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>* [[BLOCK_I]], i32 0, i32 5
|
||||
// CHECK4-NEXT: [[TMP36:%.*]] = load volatile double, double* [[TMP30]], align 8, !llvm.access.group !15
|
||||
// CHECK4-NEXT: store volatile double [[TMP36]], double* [[BLOCK_CAPTURED_I]], align 8, !noalias !14, !llvm.access.group !15
|
||||
// CHECK4-NEXT: [[TMP36:%.*]] = load volatile double, double* [[TMP30]], align 8, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK4-NEXT: store volatile double [[TMP36]], double* [[BLOCK_CAPTURED_I]], align 8, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK4-NEXT: [[BLOCK_CAPTURED3_I:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>* [[BLOCK_I]], i32 0, i32 6
|
||||
// CHECK4-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP31]], align 4, !llvm.access.group !15
|
||||
// CHECK4-NEXT: store i32 [[TMP37]], i32* [[BLOCK_CAPTURED3_I]], align 8, !noalias !14, !llvm.access.group !15
|
||||
// CHECK4-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP31]], align 4, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK4-NEXT: store i32 [[TMP37]], i32* [[BLOCK_CAPTURED3_I]], align 8, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK4-NEXT: [[TMP38:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>* [[BLOCK_I]] to void ()*
|
||||
// CHECK4-NEXT: [[BLOCK_LITERAL_I:%.*]] = bitcast void ()* [[TMP38]] to %struct.__block_literal_generic*
|
||||
// CHECK4-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL_I]], i32 0, i32 3
|
||||
// CHECK4-NEXT: [[TMP40:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL_I]] to i8*
|
||||
// CHECK4-NEXT: [[TMP41:%.*]] = load i8*, i8** [[TMP39]], align 8, !noalias !14, !llvm.access.group !15
|
||||
// CHECK4-NEXT: [[TMP41:%.*]] = load i8*, i8** [[TMP39]], align 8, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK4-NEXT: [[TMP42:%.*]] = bitcast i8* [[TMP41]] to void (i8*)*
|
||||
// CHECK4-NEXT: call void [[TMP42]](i8* noundef [[TMP40]]) #[[ATTR4]], !llvm.access.group !15
|
||||
// CHECK4-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
|
||||
// CHECK4-NEXT: call void [[TMP42]](i8* noundef [[TMP40]]) #[[ATTR4]], !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK4-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK4-NEXT: [[ADD4_I:%.*]] = add nsw i32 [[TMP43]], 1
|
||||
// CHECK4-NEXT: store i32 [[ADD4_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
|
||||
// CHECK4-NEXT: store i32 [[ADD4_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP16:![0-9]+]]
|
||||
// CHECK4: omp.inner.for.end.i:
|
||||
// CHECK4-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTLITER__ADDR_I]], align 4, !noalias !14
|
||||
|
@ -1646,17 +1646,17 @@ void loop() {
|
|||
// CHECK5-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14
|
||||
// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
|
||||
// CHECK5: omp.inner.for.cond.i:
|
||||
// CHECK5-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
|
||||
// CHECK5-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15:![0-9]+]]
|
||||
// CHECK5-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP35]] to i64
|
||||
// CHECK5-NEXT: [[TMP36:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !14, !llvm.access.group !15
|
||||
// CHECK5-NEXT: [[TMP36:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK5-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP36]]
|
||||
// CHECK5-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
|
||||
// CHECK5: omp.inner.for.body.i:
|
||||
// CHECK5-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
|
||||
// CHECK5-NEXT: store i32 [[TMP37]], i32* [[I_I]], align 4, !noalias !14, !llvm.access.group !15
|
||||
// CHECK5-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
|
||||
// CHECK5-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK5-NEXT: store i32 [[TMP37]], i32* [[I_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK5-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK5-NEXT: [[ADD3_I:%.*]] = add nsw i32 [[TMP38]], 1
|
||||
// CHECK5-NEXT: store i32 [[ADD3_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
|
||||
// CHECK5-NEXT: store i32 [[ADD3_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP16:![0-9]+]]
|
||||
// CHECK5: omp.inner.for.end.i:
|
||||
// CHECK5-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTLITER__ADDR_I]], align 4, !noalias !14
|
||||
|
@ -1823,24 +1823,24 @@ void loop() {
|
|||
// CHECK6-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14
|
||||
// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
|
||||
// CHECK6: omp.inner.for.cond.i:
|
||||
// CHECK6-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
|
||||
// CHECK6-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15:![0-9]+]]
|
||||
// CHECK6-NEXT: [[CONV3_I:%.*]] = sext i32 [[TMP30]] to i64
|
||||
// CHECK6-NEXT: [[TMP31:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !14, !llvm.access.group !15
|
||||
// CHECK6-NEXT: [[TMP31:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK6-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV3_I]], [[TMP31]]
|
||||
// CHECK6-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
|
||||
// CHECK6: omp.inner.for.body.i:
|
||||
// CHECK6-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
|
||||
// CHECK6-NEXT: store i32 [[TMP32]], i32* [[I_I]], align 4, !noalias !14, !llvm.access.group !15
|
||||
// CHECK6-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTLINEAR_START1_I]], align 4, !noalias !14, !llvm.access.group !15
|
||||
// CHECK6-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
|
||||
// CHECK6-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK6-NEXT: store i32 [[TMP32]], i32* [[I_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK6-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTLINEAR_START1_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK6-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK6-NEXT: [[ADD5_I:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
|
||||
// CHECK6-NEXT: store i32 [[ADD5_I]], i32* [[J_I]], align 4, !noalias !14, !llvm.access.group !15
|
||||
// CHECK6-NEXT: [[TMP35:%.*]] = load i32, i32* [[J_I]], align 4, !noalias !14, !llvm.access.group !15
|
||||
// CHECK6-NEXT: store i32 [[ADD5_I]], i32* [[J_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK6-NEXT: [[TMP35:%.*]] = load i32, i32* [[J_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK6-NEXT: [[INC_I:%.*]] = add nsw i32 [[TMP35]], 1
|
||||
// CHECK6-NEXT: store i32 [[INC_I]], i32* [[J_I]], align 4, !noalias !14, !llvm.access.group !15
|
||||
// CHECK6-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
|
||||
// CHECK6-NEXT: store i32 [[INC_I]], i32* [[J_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK6-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK6-NEXT: [[ADD6_I:%.*]] = add nsw i32 [[TMP36]], 1
|
||||
// CHECK6-NEXT: store i32 [[ADD6_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group !15
|
||||
// CHECK6-NEXT: store i32 [[ADD6_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14, !llvm.access.group [[ACC_GRP15]]
|
||||
// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP16:![0-9]+]]
|
||||
// CHECK6: omp.inner.for.end.i:
|
||||
// CHECK6-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTLITER__ADDR_I]], align 4, !noalias !14
|
||||
|
@ -1903,33 +1903,33 @@ void loop() {
|
|||
// CHECK7: arrayctor.cont:
|
||||
// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
|
||||
// CHECK7: omp.inner.for.cond:
|
||||
// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
|
||||
// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
|
||||
// CHECK7-NEXT: [[CONV5:%.*]] = sext i32 [[TMP2]] to i64
|
||||
// CHECK7-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !2
|
||||
// CHECK7-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK7-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV5]], [[TMP3]]
|
||||
// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
|
||||
// CHECK7: omp.inner.for.cond.cleanup:
|
||||
// CHECK7-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
|
||||
// CHECK7: omp.inner.for.body:
|
||||
// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
|
||||
// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
|
||||
// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
||||
// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
|
||||
// CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !2
|
||||
// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 0
|
||||
// CHECK7-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
|
||||
// CHECK7-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK7-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 0
|
||||
// CHECK7-NEXT: [[TMP6:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8*
|
||||
// CHECK7-NEXT: [[TMP7:%.*]] = bitcast %struct.S* [[VAR1]] to i8*
|
||||
// CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP6]], i8* align 8 [[TMP7]], i64 8, i1 false), !llvm.access.group !2
|
||||
// CHECK7-NEXT: store i32 33, i32* [[SIVAR]], align 4, !llvm.access.group !2
|
||||
// CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP6]], i8* align 8 [[TMP7]], i64 8, i1 false), !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK7-NEXT: store i32 33, i32* [[SIVAR]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
|
||||
// CHECK7: omp.body.continue:
|
||||
// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
|
||||
// CHECK7: omp.inner.for.inc:
|
||||
// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
|
||||
// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK7-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP8]], 1
|
||||
// CHECK7-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
|
||||
// CHECK7-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
|
||||
// CHECK7: omp.inner.for.end:
|
||||
// CHECK7-NEXT: store i32 10, i32* [[I]], align 4
|
||||
|
@ -2069,32 +2069,32 @@ void loop() {
|
|||
// CHECK7-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR4]])
|
||||
// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
|
||||
// CHECK7: omp.inner.for.cond:
|
||||
// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
|
||||
// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
|
||||
// CHECK7-NEXT: [[CONV5:%.*]] = sext i32 [[TMP2]] to i64
|
||||
// CHECK7-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !6
|
||||
// CHECK7-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP6]]
|
||||
// CHECK7-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV5]], [[TMP3]]
|
||||
// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
|
||||
// CHECK7: omp.inner.for.cond.cleanup:
|
||||
// CHECK7-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
|
||||
// CHECK7: omp.inner.for.body:
|
||||
// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
|
||||
// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
|
||||
// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
|
||||
// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
||||
// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
|
||||
// CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR1]], align 128, !llvm.access.group !6
|
||||
// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
|
||||
// CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR1]], align 128, !llvm.access.group [[ACC_GRP6]]
|
||||
// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 0
|
||||
// CHECK7-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
|
||||
// CHECK7-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]]
|
||||
// CHECK7-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i64 0, i64 0
|
||||
// CHECK7-NEXT: [[TMP6:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8*
|
||||
// CHECK7-NEXT: [[TMP7:%.*]] = bitcast %struct.S.0* [[VAR4]] to i8*
|
||||
// CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 4, i1 false), !llvm.access.group !6
|
||||
// CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 4, i1 false), !llvm.access.group [[ACC_GRP6]]
|
||||
// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
|
||||
// CHECK7: omp.body.continue:
|
||||
// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
|
||||
// CHECK7: omp.inner.for.inc:
|
||||
// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
|
||||
// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
|
||||
// CHECK7-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP8]], 1
|
||||
// CHECK7-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
|
||||
// CHECK7-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
|
||||
// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
|
||||
// CHECK7: omp.inner.for.end:
|
||||
// CHECK7-NEXT: store i32 10, i32* [[I]], align 4
|
||||
|
@ -2296,48 +2296,48 @@ void loop() {
|
|||
// CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_IV]], align 4
|
||||
// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
|
||||
// CHECK10: omp.inner.for.cond:
|
||||
// CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
|
||||
// CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
|
||||
// CHECK10-NEXT: [[CONV1:%.*]] = sext i32 [[TMP1]] to i64
|
||||
// CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !2
|
||||
// CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK10-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV1]], [[TMP2]]
|
||||
// CHECK10-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
|
||||
// CHECK10: omp.inner.for.body:
|
||||
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
|
||||
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
|
||||
// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
||||
// CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
|
||||
// CHECK10-NEXT: store double 1.000000e+00, double* [[G]], align 8, !llvm.access.group !2
|
||||
// CHECK10-NEXT: store i32 11, i32* [[SIVAR]], align 4, !llvm.access.group !2
|
||||
// CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK10-NEXT: store double 1.000000e+00, double* [[G]], align 8, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK10-NEXT: store i32 11, i32* [[SIVAR]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK10-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>* [[BLOCK2]], i32 0, i32 0
|
||||
// CHECK10-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8, !llvm.access.group !2
|
||||
// CHECK10-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK10-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>* [[BLOCK2]], i32 0, i32 1
|
||||
// CHECK10-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8, !llvm.access.group !2
|
||||
// CHECK10-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK10-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>* [[BLOCK2]], i32 0, i32 2
|
||||
// CHECK10-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4, !llvm.access.group !2
|
||||
// CHECK10-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK10-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>* [[BLOCK2]], i32 0, i32 3
|
||||
// CHECK10-NEXT: store i8* bitcast (void (i8*)* @__main_block_invoke_2 to i8*), i8** [[BLOCK_INVOKE]], align 8, !llvm.access.group !2
|
||||
// CHECK10-NEXT: store i8* bitcast (void (i8*)* @__main_block_invoke_2 to i8*), i8** [[BLOCK_INVOKE]], align 8, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK10-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>* [[BLOCK2]], i32 0, i32 4
|
||||
// CHECK10-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.1 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8, !llvm.access.group !2
|
||||
// CHECK10-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.1 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK10-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>* [[BLOCK2]], i32 0, i32 5
|
||||
// CHECK10-NEXT: [[TMP4:%.*]] = load volatile double, double* [[G]], align 8, !llvm.access.group !2
|
||||
// CHECK10-NEXT: store volatile double [[TMP4]], double* [[BLOCK_CAPTURED]], align 8, !llvm.access.group !2
|
||||
// CHECK10-NEXT: [[TMP4:%.*]] = load volatile double, double* [[G]], align 8, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK10-NEXT: store volatile double [[TMP4]], double* [[BLOCK_CAPTURED]], align 8, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK10-NEXT: [[BLOCK_CAPTURED3:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>* [[BLOCK2]], i32 0, i32 6
|
||||
// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[SIVAR]], align 4, !llvm.access.group !2
|
||||
// CHECK10-NEXT: store i32 [[TMP5]], i32* [[BLOCK_CAPTURED3]], align 8, !llvm.access.group !2
|
||||
// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[SIVAR]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK10-NEXT: store i32 [[TMP5]], i32* [[BLOCK_CAPTURED3]], align 8, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK10-NEXT: [[TMP6:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, i32 }>* [[BLOCK2]] to void ()*
|
||||
// CHECK10-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP6]] to %struct.__block_literal_generic*
|
||||
// CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3
|
||||
// CHECK10-NEXT: [[TMP8:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8*
|
||||
// CHECK10-NEXT: [[TMP9:%.*]] = load i8*, i8** [[TMP7]], align 8, !llvm.access.group !2
|
||||
// CHECK10-NEXT: [[TMP9:%.*]] = load i8*, i8** [[TMP7]], align 8, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to void (i8*)*
|
||||
// CHECK10-NEXT: call void [[TMP10]](i8* noundef [[TMP8]]), !llvm.access.group !2
|
||||
// CHECK10-NEXT: call void [[TMP10]](i8* noundef [[TMP8]]), !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
|
||||
// CHECK10: omp.body.continue:
|
||||
// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
|
||||
// CHECK10: omp.inner.for.inc:
|
||||
// CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
|
||||
// CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK10-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
|
||||
// CHECK10-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
|
||||
// CHECK10-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
|
||||
// CHECK10: omp.inner.for.end:
|
||||
// CHECK10-NEXT: store i32 10, i32* [[I]], align 4
|
||||
|
@ -2388,23 +2388,23 @@ void loop() {
|
|||
// CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_IV]], align 4
|
||||
// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
|
||||
// CHECK11: omp.inner.for.cond:
|
||||
// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
|
||||
// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
|
||||
// CHECK11-NEXT: [[CONV3:%.*]] = sext i32 [[TMP3]] to i64
|
||||
// CHECK11-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !2
|
||||
// CHECK11-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK11-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV3]], [[TMP4]]
|
||||
// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
|
||||
// CHECK11: omp.inner.for.body:
|
||||
// CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
|
||||
// CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP5]], 1
|
||||
// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
||||
// CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
|
||||
// CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
|
||||
// CHECK11: omp.body.continue:
|
||||
// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
|
||||
// CHECK11: omp.inner.for.inc:
|
||||
// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
|
||||
// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP6]], 1
|
||||
// CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
|
||||
// CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
|
||||
// CHECK11: omp.inner.for.end:
|
||||
// CHECK11-NEXT: store i32 10, i32* [[I]], align 4
|
||||
|
@ -2440,31 +2440,31 @@ void loop() {
|
|||
// CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTLINEAR_START1]], align 4
|
||||
// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
|
||||
// CHECK12: omp.inner.for.cond:
|
||||
// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
|
||||
// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
|
||||
// CHECK12-NEXT: [[CONV5:%.*]] = sext i32 [[TMP3]] to i64
|
||||
// CHECK12-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !2
|
||||
// CHECK12-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK12-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV5]], [[TMP4]]
|
||||
// CHECK12-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
|
||||
// CHECK12: omp.inner.for.body:
|
||||
// CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
|
||||
// CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP5]], 1
|
||||
// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
||||
// CHECK12-NEXT: store i32 [[ADD]], i32* [[I2]], align 4, !llvm.access.group !2
|
||||
// CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTLINEAR_START1]], align 4, !llvm.access.group !2
|
||||
// CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
|
||||
// CHECK12-NEXT: store i32 [[ADD]], i32* [[I2]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTLINEAR_START1]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK12-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP7]], 1
|
||||
// CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP6]], [[MUL6]]
|
||||
// CHECK12-NEXT: store i32 [[ADD7]], i32* [[J4]], align 4, !llvm.access.group !2
|
||||
// CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[J4]], align 4, !llvm.access.group !2
|
||||
// CHECK12-NEXT: store i32 [[ADD7]], i32* [[J4]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[J4]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK12-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1
|
||||
// CHECK12-NEXT: store i32 [[INC]], i32* [[J4]], align 4, !llvm.access.group !2
|
||||
// CHECK12-NEXT: store i32 [[INC]], i32* [[J4]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
|
||||
// CHECK12: omp.body.continue:
|
||||
// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
|
||||
// CHECK12: omp.inner.for.inc:
|
||||
// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
|
||||
// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP9]], 1
|
||||
// CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
|
||||
// CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
|
||||
// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
|
||||
// CHECK12: omp.inner.for.end:
|
||||
// CHECK12-NEXT: store i32 10, i32* [[I]], align 4
|
||||
|
|
|
@ -440,7 +440,7 @@ int main(int argc, char **argv) {
|
|||
// CHECK1-NEXT: [[TMP36:%.*]] = sdiv exact i64 [[TMP35]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
|
||||
// CHECK1-NEXT: [[TMP37:%.*]] = add nuw i64 [[TMP36]], 1
|
||||
// CHECK1-NEXT: [[TMP38:%.*]] = mul nuw i64 [[TMP37]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
|
||||
// CHECK1-NEXT: store i64 [[TMP37]], i64* @{{reduction_size[.].+[.]}}, align 8
|
||||
// CHECK1-NEXT: store i64 [[TMP37]], i64* @{{reduction_size[.].+[.]}}, align 8, !noalias !12
|
||||
// CHECK1-NEXT: [[TMP39:%.*]] = load i8*, i8** [[TMP16]], align 8
|
||||
// CHECK1-NEXT: [[TMP40:%.*]] = call i8* @__kmpc_task_reduction_get_th_data(i32 [[TMP20]], i8* [[TMP39]], i8* [[TMP25]]) #[[ATTR5]]
|
||||
// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2
|
||||
|
|
|
@ -482,7 +482,7 @@ int main(int argc, char **argv) {
|
|||
// CHECK1-NEXT: [[TMP36:%.*]] = sdiv exact i64 [[TMP35]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
|
||||
// CHECK1-NEXT: [[TMP37:%.*]] = add nuw i64 [[TMP36]], 1
|
||||
// CHECK1-NEXT: [[TMP38:%.*]] = mul nuw i64 [[TMP37]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
|
||||
// CHECK1-NEXT: store i64 [[TMP37]], i64* @{{reduction_size[.].+[.]}}, align 8
|
||||
// CHECK1-NEXT: store i64 [[TMP37]], i64* @{{reduction_size[.].+[.]}}, align 8, !noalias !12
|
||||
// CHECK1-NEXT: [[TMP39:%.*]] = load i8*, i8** [[TMP16]], align 8
|
||||
// CHECK1-NEXT: [[TMP40:%.*]] = call i8* @__kmpc_task_reduction_get_th_data(i32 [[TMP20]], i8* [[TMP39]], i8* [[TMP25]]) #[[ATTR5]]
|
||||
// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2
|
||||
|
|
|
@ -830,31 +830,31 @@ int bar(int n){
|
|||
// CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
|
||||
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
|
||||
// CHECK1: omp.inner.for.cond:
|
||||
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
|
||||
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
|
||||
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
|
||||
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
|
||||
// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
|
||||
// CHECK1: omp.inner.for.body:
|
||||
// CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
|
||||
// CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
|
||||
// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 10, [[MUL]]
|
||||
// CHECK1-NEXT: store i32 [[SUB]], i32* [[I]], align 4, !llvm.access.group !12
|
||||
// CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTLINEAR_START]], align 8, !llvm.access.group !12
|
||||
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
|
||||
// CHECK1-NEXT: store i32 [[SUB]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTLINEAR_START]], align 8, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK1-NEXT: [[MUL2:%.*]] = mul nsw i32 [[TMP9]], 3
|
||||
// CHECK1-NEXT: [[CONV3:%.*]] = sext i32 [[MUL2]] to i64
|
||||
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP8]], [[CONV3]]
|
||||
// CHECK1-NEXT: store i64 [[ADD]], i64* [[K1]], align 8, !llvm.access.group !12
|
||||
// CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !12
|
||||
// CHECK1-NEXT: store i64 [[ADD]], i64* [[K1]], align 8, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 1
|
||||
// CHECK1-NEXT: store i32 [[ADD4]], i32* [[CONV]], align 4, !llvm.access.group !12
|
||||
// CHECK1-NEXT: store i32 [[ADD4]], i32* [[CONV]], align 4, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
|
||||
// CHECK1: omp.body.continue:
|
||||
// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
|
||||
// CHECK1: omp.inner.for.inc:
|
||||
// CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
|
||||
// CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1
|
||||
// CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
|
||||
// CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
|
||||
// CHECK1: omp.inner.for.end:
|
||||
// CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
|
||||
|
@ -2566,31 +2566,31 @@ int bar(int n){
|
|||
// CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
|
||||
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
|
||||
// CHECK3: omp.inner.for.cond:
|
||||
// CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
|
||||
// CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
|
||||
// CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
|
||||
// CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
|
||||
// CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
|
||||
// CHECK3: omp.inner.for.body:
|
||||
// CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
|
||||
// CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
|
||||
// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 10, [[MUL]]
|
||||
// CHECK3-NEXT: store i32 [[SUB]], i32* [[I]], align 4, !llvm.access.group !13
|
||||
// CHECK3-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTLINEAR_START]], align 8, !llvm.access.group !13
|
||||
// CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
|
||||
// CHECK3-NEXT: store i32 [[SUB]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK3-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTLINEAR_START]], align 8, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK3-NEXT: [[MUL2:%.*]] = mul nsw i32 [[TMP10]], 3
|
||||
// CHECK3-NEXT: [[CONV:%.*]] = sext i32 [[MUL2]] to i64
|
||||
// CHECK3-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP9]], [[CONV]]
|
||||
// CHECK3-NEXT: store i64 [[ADD]], i64* [[K1]], align 8, !llvm.access.group !13
|
||||
// CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !13
|
||||
// CHECK3-NEXT: store i64 [[ADD]], i64* [[K1]], align 8, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1
|
||||
// CHECK3-NEXT: store i32 [[ADD3]], i32* [[A_ADDR]], align 4, !llvm.access.group !13
|
||||
// CHECK3-NEXT: store i32 [[ADD3]], i32* [[A_ADDR]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
|
||||
// CHECK3: omp.body.continue:
|
||||
// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
|
||||
// CHECK3: omp.inner.for.inc:
|
||||
// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
|
||||
// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 1
|
||||
// CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
|
||||
// CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
|
||||
// CHECK3: omp.inner.for.end:
|
||||
// CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
|
||||
|
@ -5872,31 +5872,31 @@ int bar(int n){
|
|||
// CHECK17-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
|
||||
// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
|
||||
// CHECK17: omp.inner.for.cond:
|
||||
// CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
|
||||
// CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
|
||||
// CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
|
||||
// CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
|
||||
// CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
|
||||
// CHECK17: omp.inner.for.body:
|
||||
// CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
|
||||
// CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
|
||||
// CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 10, [[MUL]]
|
||||
// CHECK17-NEXT: store i32 [[SUB]], i32* [[I]], align 4, !llvm.access.group !12
|
||||
// CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTLINEAR_START]], align 8, !llvm.access.group !12
|
||||
// CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
|
||||
// CHECK17-NEXT: store i32 [[SUB]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTLINEAR_START]], align 8, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK17-NEXT: [[MUL2:%.*]] = mul nsw i32 [[TMP9]], 3
|
||||
// CHECK17-NEXT: [[CONV3:%.*]] = sext i32 [[MUL2]] to i64
|
||||
// CHECK17-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP8]], [[CONV3]]
|
||||
// CHECK17-NEXT: store i64 [[ADD]], i64* [[K1]], align 8, !llvm.access.group !12
|
||||
// CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !12
|
||||
// CHECK17-NEXT: store i64 [[ADD]], i64* [[K1]], align 8, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK17-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 1
|
||||
// CHECK17-NEXT: store i32 [[ADD4]], i32* [[CONV]], align 4, !llvm.access.group !12
|
||||
// CHECK17-NEXT: store i32 [[ADD4]], i32* [[CONV]], align 4, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
|
||||
// CHECK17: omp.body.continue:
|
||||
// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
|
||||
// CHECK17: omp.inner.for.inc:
|
||||
// CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
|
||||
// CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK17-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1
|
||||
// CHECK17-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
|
||||
// CHECK17-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
|
||||
// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
|
||||
// CHECK17: omp.inner.for.end:
|
||||
// CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
|
||||
|
@ -7608,31 +7608,31 @@ int bar(int n){
|
|||
// CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
|
||||
// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
|
||||
// CHECK19: omp.inner.for.cond:
|
||||
// CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
|
||||
// CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
|
||||
// CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
|
||||
// CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK19-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
|
||||
// CHECK19-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
|
||||
// CHECK19: omp.inner.for.body:
|
||||
// CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
|
||||
// CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
|
||||
// CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 10, [[MUL]]
|
||||
// CHECK19-NEXT: store i32 [[SUB]], i32* [[I]], align 4, !llvm.access.group !13
|
||||
// CHECK19-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTLINEAR_START]], align 8, !llvm.access.group !13
|
||||
// CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
|
||||
// CHECK19-NEXT: store i32 [[SUB]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK19-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTLINEAR_START]], align 8, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK19-NEXT: [[MUL2:%.*]] = mul nsw i32 [[TMP10]], 3
|
||||
// CHECK19-NEXT: [[CONV:%.*]] = sext i32 [[MUL2]] to i64
|
||||
// CHECK19-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP9]], [[CONV]]
|
||||
// CHECK19-NEXT: store i64 [[ADD]], i64* [[K1]], align 8, !llvm.access.group !13
|
||||
// CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !13
|
||||
// CHECK19-NEXT: store i64 [[ADD]], i64* [[K1]], align 8, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK19-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1
|
||||
// CHECK19-NEXT: store i32 [[ADD3]], i32* [[A_ADDR]], align 4, !llvm.access.group !13
|
||||
// CHECK19-NEXT: store i32 [[ADD3]], i32* [[A_ADDR]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
|
||||
// CHECK19: omp.body.continue:
|
||||
// CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
|
||||
// CHECK19: omp.inner.for.inc:
|
||||
// CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
|
||||
// CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK19-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 1
|
||||
// CHECK19-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
|
||||
// CHECK19-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
|
||||
// CHECK19: omp.inner.for.end:
|
||||
// CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
|
||||
|
|
|
@ -507,7 +507,7 @@ int main(int argc, char **argv) {
|
|||
// CHECK1-NEXT: [[TMP36:%.*]] = sdiv exact i64 [[TMP35]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
|
||||
// CHECK1-NEXT: [[TMP37:%.*]] = add nuw i64 [[TMP36]], 1
|
||||
// CHECK1-NEXT: [[TMP38:%.*]] = mul nuw i64 [[TMP37]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
|
||||
// CHECK1-NEXT: store i64 [[TMP37]], i64* @{{reduction_size[.].+[.]}}, align 8
|
||||
// CHECK1-NEXT: store i64 [[TMP37]], i64* @{{reduction_size[.].+[.]}}, align 8, !noalias !12
|
||||
// CHECK1-NEXT: [[TMP39:%.*]] = load i8*, i8** [[TMP16]], align 8
|
||||
// CHECK1-NEXT: [[TMP40:%.*]] = call i8* @__kmpc_task_reduction_get_th_data(i32 [[TMP20]], i8* [[TMP39]], i8* [[TMP25]]) #[[ATTR5]]
|
||||
// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -1270,58 +1270,58 @@ int bar(int n){
|
|||
// CHECK1: omp.dispatch.body:
|
||||
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
|
||||
// CHECK1: omp.inner.for.cond:
|
||||
// CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
|
||||
// CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
|
||||
// CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]
|
||||
// CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]]
|
||||
// CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
|
||||
// CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
|
||||
// CHECK1: omp.inner.for.body:
|
||||
// CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
|
||||
// CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
|
||||
// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
|
||||
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
||||
// CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
|
||||
// CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !22
|
||||
// CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP22]]
|
||||
// CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group [[ACC_GRP22]]
|
||||
// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
|
||||
// CHECK1-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 4, !llvm.access.group !22
|
||||
// CHECK1-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 4, !llvm.access.group [[ACC_GRP22]]
|
||||
// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i64 0, i64 2
|
||||
// CHECK1-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !22
|
||||
// CHECK1-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP22]]
|
||||
// CHECK1-NEXT: [[CONV9:%.*]] = fpext float [[TMP20]] to double
|
||||
// CHECK1-NEXT: [[ADD10:%.*]] = fadd double [[CONV9]], 1.000000e+00
|
||||
// CHECK1-NEXT: [[CONV11:%.*]] = fptrunc double [[ADD10]] to float
|
||||
// CHECK1-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group !22
|
||||
// CHECK1-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP22]]
|
||||
// CHECK1-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 3
|
||||
// CHECK1-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group !22
|
||||
// CHECK1-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group [[ACC_GRP22]]
|
||||
// CHECK1-NEXT: [[CONV13:%.*]] = fpext float [[TMP21]] to double
|
||||
// CHECK1-NEXT: [[ADD14:%.*]] = fadd double [[CONV13]], 1.000000e+00
|
||||
// CHECK1-NEXT: [[CONV15:%.*]] = fptrunc double [[ADD14]] to float
|
||||
// CHECK1-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group !22
|
||||
// CHECK1-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group [[ACC_GRP22]]
|
||||
// CHECK1-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i64 0, i64 1
|
||||
// CHECK1-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX16]], i64 0, i64 2
|
||||
// CHECK1-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group !22
|
||||
// CHECK1-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group [[ACC_GRP22]]
|
||||
// CHECK1-NEXT: [[ADD18:%.*]] = fadd double [[TMP22]], 1.000000e+00
|
||||
// CHECK1-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !22
|
||||
// CHECK1-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group [[ACC_GRP22]]
|
||||
// CHECK1-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP5]]
|
||||
// CHECK1-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds double, double* [[TMP6]], i64 [[TMP23]]
|
||||
// CHECK1-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX19]], i64 3
|
||||
// CHECK1-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group !22
|
||||
// CHECK1-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group [[ACC_GRP22]]
|
||||
// CHECK1-NEXT: [[ADD21:%.*]] = fadd double [[TMP24]], 1.000000e+00
|
||||
// CHECK1-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group !22
|
||||
// CHECK1-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group [[ACC_GRP22]]
|
||||
// CHECK1-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
|
||||
// CHECK1-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group !22
|
||||
// CHECK1-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group [[ACC_GRP22]]
|
||||
// CHECK1-NEXT: [[ADD22:%.*]] = add nsw i64 [[TMP25]], 1
|
||||
// CHECK1-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group !22
|
||||
// CHECK1-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group [[ACC_GRP22]]
|
||||
// CHECK1-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
|
||||
// CHECK1-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group !22
|
||||
// CHECK1-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group [[ACC_GRP22]]
|
||||
// CHECK1-NEXT: [[CONV23:%.*]] = sext i8 [[TMP26]] to i32
|
||||
// CHECK1-NEXT: [[ADD24:%.*]] = add nsw i32 [[CONV23]], 1
|
||||
// CHECK1-NEXT: [[CONV25:%.*]] = trunc i32 [[ADD24]] to i8
|
||||
// CHECK1-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group !22
|
||||
// CHECK1-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group [[ACC_GRP22]]
|
||||
// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
|
||||
// CHECK1: omp.body.continue:
|
||||
// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
|
||||
// CHECK1: omp.inner.for.inc:
|
||||
// CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
|
||||
// CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
|
||||
// CHECK1-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP27]], 1
|
||||
// CHECK1-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
|
||||
// CHECK1-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
|
||||
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
|
||||
// CHECK1: omp.inner.for.end:
|
||||
// CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
|
||||
|
@ -3074,58 +3074,58 @@ int bar(int n){
|
|||
// CHECK3: omp.dispatch.body:
|
||||
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
|
||||
// CHECK3: omp.inner.for.cond:
|
||||
// CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
|
||||
// CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23
|
||||
// CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
|
||||
// CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]
|
||||
// CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
|
||||
// CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
|
||||
// CHECK3: omp.inner.for.body:
|
||||
// CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
|
||||
// CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
|
||||
// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
|
||||
// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
||||
// CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !23
|
||||
// CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !23
|
||||
// CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP23]]
|
||||
// CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group [[ACC_GRP23]]
|
||||
// CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
|
||||
// CHECK3-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group !23
|
||||
// CHECK3-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group [[ACC_GRP23]]
|
||||
// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i32 0, i32 2
|
||||
// CHECK3-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !23
|
||||
// CHECK3-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP23]]
|
||||
// CHECK3-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double
|
||||
// CHECK3-NEXT: [[ADD8:%.*]] = fadd double [[CONV]], 1.000000e+00
|
||||
// CHECK3-NEXT: [[CONV9:%.*]] = fptrunc double [[ADD8]] to float
|
||||
// CHECK3-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group !23
|
||||
// CHECK3-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP23]]
|
||||
// CHECK3-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 3
|
||||
// CHECK3-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group !23
|
||||
// CHECK3-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group [[ACC_GRP23]]
|
||||
// CHECK3-NEXT: [[CONV11:%.*]] = fpext float [[TMP21]] to double
|
||||
// CHECK3-NEXT: [[ADD12:%.*]] = fadd double [[CONV11]], 1.000000e+00
|
||||
// CHECK3-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float
|
||||
// CHECK3-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group !23
|
||||
// CHECK3-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group [[ACC_GRP23]]
|
||||
// CHECK3-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i32 0, i32 1
|
||||
// CHECK3-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX14]], i32 0, i32 2
|
||||
// CHECK3-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group !23
|
||||
// CHECK3-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group [[ACC_GRP23]]
|
||||
// CHECK3-NEXT: [[ADD16:%.*]] = fadd double [[TMP22]], 1.000000e+00
|
||||
// CHECK3-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group !23
|
||||
// CHECK3-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group [[ACC_GRP23]]
|
||||
// CHECK3-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP5]]
|
||||
// CHECK3-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP6]], i32 [[TMP23]]
|
||||
// CHECK3-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX17]], i32 3
|
||||
// CHECK3-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group !23
|
||||
// CHECK3-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group [[ACC_GRP23]]
|
||||
// CHECK3-NEXT: [[ADD19:%.*]] = fadd double [[TMP24]], 1.000000e+00
|
||||
// CHECK3-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group !23
|
||||
// CHECK3-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group [[ACC_GRP23]]
|
||||
// CHECK3-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
|
||||
// CHECK3-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group !23
|
||||
// CHECK3-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group [[ACC_GRP23]]
|
||||
// CHECK3-NEXT: [[ADD20:%.*]] = add nsw i64 [[TMP25]], 1
|
||||
// CHECK3-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group !23
|
||||
// CHECK3-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group [[ACC_GRP23]]
|
||||
// CHECK3-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
|
||||
// CHECK3-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group !23
|
||||
// CHECK3-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group [[ACC_GRP23]]
|
||||
// CHECK3-NEXT: [[CONV21:%.*]] = sext i8 [[TMP26]] to i32
|
||||
// CHECK3-NEXT: [[ADD22:%.*]] = add nsw i32 [[CONV21]], 1
|
||||
// CHECK3-NEXT: [[CONV23:%.*]] = trunc i32 [[ADD22]] to i8
|
||||
// CHECK3-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group !23
|
||||
// CHECK3-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group [[ACC_GRP23]]
|
||||
// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
|
||||
// CHECK3: omp.body.continue:
|
||||
// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
|
||||
// CHECK3: omp.inner.for.inc:
|
||||
// CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
|
||||
// CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
|
||||
// CHECK3-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP27]], 1
|
||||
// CHECK3-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
|
||||
// CHECK3-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
|
||||
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
|
||||
// CHECK3: omp.inner.for.end:
|
||||
// CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
|
||||
|
@ -4297,58 +4297,58 @@ int bar(int n){
|
|||
// CHECK9: omp.dispatch.body:
|
||||
// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
|
||||
// CHECK9: omp.inner.for.cond:
|
||||
// CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
|
||||
// CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
|
||||
// CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
|
||||
// CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
|
||||
// CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
|
||||
// CHECK9: omp.inner.for.body:
|
||||
// CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
|
||||
// CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
|
||||
// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
||||
// CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
|
||||
// CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !13
|
||||
// CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
|
||||
// CHECK9-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 4, !llvm.access.group !13
|
||||
// CHECK9-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i64 0, i64 2
|
||||
// CHECK9-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !13
|
||||
// CHECK9-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK9-NEXT: [[CONV9:%.*]] = fpext float [[TMP20]] to double
|
||||
// CHECK9-NEXT: [[ADD10:%.*]] = fadd double [[CONV9]], 1.000000e+00
|
||||
// CHECK9-NEXT: [[CONV11:%.*]] = fptrunc double [[ADD10]] to float
|
||||
// CHECK9-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group !13
|
||||
// CHECK9-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK9-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 3
|
||||
// CHECK9-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group !13
|
||||
// CHECK9-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK9-NEXT: [[CONV13:%.*]] = fpext float [[TMP21]] to double
|
||||
// CHECK9-NEXT: [[ADD14:%.*]] = fadd double [[CONV13]], 1.000000e+00
|
||||
// CHECK9-NEXT: [[CONV15:%.*]] = fptrunc double [[ADD14]] to float
|
||||
// CHECK9-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group !13
|
||||
// CHECK9-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK9-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i64 0, i64 1
|
||||
// CHECK9-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX16]], i64 0, i64 2
|
||||
// CHECK9-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group !13
|
||||
// CHECK9-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK9-NEXT: [[ADD18:%.*]] = fadd double [[TMP22]], 1.000000e+00
|
||||
// CHECK9-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !13
|
||||
// CHECK9-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK9-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP5]]
|
||||
// CHECK9-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds double, double* [[TMP6]], i64 [[TMP23]]
|
||||
// CHECK9-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX19]], i64 3
|
||||
// CHECK9-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group !13
|
||||
// CHECK9-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK9-NEXT: [[ADD21:%.*]] = fadd double [[TMP24]], 1.000000e+00
|
||||
// CHECK9-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group !13
|
||||
// CHECK9-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK9-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
|
||||
// CHECK9-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group !13
|
||||
// CHECK9-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK9-NEXT: [[ADD22:%.*]] = add nsw i64 [[TMP25]], 1
|
||||
// CHECK9-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group !13
|
||||
// CHECK9-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK9-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
|
||||
// CHECK9-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group !13
|
||||
// CHECK9-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK9-NEXT: [[CONV23:%.*]] = sext i8 [[TMP26]] to i32
|
||||
// CHECK9-NEXT: [[ADD24:%.*]] = add nsw i32 [[CONV23]], 1
|
||||
// CHECK9-NEXT: [[CONV25:%.*]] = trunc i32 [[ADD24]] to i8
|
||||
// CHECK9-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group !13
|
||||
// CHECK9-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
|
||||
// CHECK9: omp.body.continue:
|
||||
// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
|
||||
// CHECK9: omp.inner.for.inc:
|
||||
// CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
|
||||
// CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK9-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP27]], 1
|
||||
// CHECK9-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
|
||||
// CHECK9-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
|
||||
// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
|
||||
// CHECK9: omp.inner.for.end:
|
||||
// CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
|
||||
|
@ -5134,58 +5134,58 @@ int bar(int n){
|
|||
// CHECK11: omp.dispatch.body:
|
||||
// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
|
||||
// CHECK11: omp.inner.for.cond:
|
||||
// CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
|
||||
// CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
|
||||
// CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
|
||||
// CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]]
|
||||
// CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
|
||||
// CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
|
||||
// CHECK11: omp.inner.for.body:
|
||||
// CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
|
||||
// CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
|
||||
// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
|
||||
// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
||||
// CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
|
||||
// CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !14
|
||||
// CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP14]]
|
||||
// CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group [[ACC_GRP14]]
|
||||
// CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
|
||||
// CHECK11-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group !14
|
||||
// CHECK11-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group [[ACC_GRP14]]
|
||||
// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i32 0, i32 2
|
||||
// CHECK11-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !14
|
||||
// CHECK11-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP14]]
|
||||
// CHECK11-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double
|
||||
// CHECK11-NEXT: [[ADD8:%.*]] = fadd double [[CONV]], 1.000000e+00
|
||||
// CHECK11-NEXT: [[CONV9:%.*]] = fptrunc double [[ADD8]] to float
|
||||
// CHECK11-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group !14
|
||||
// CHECK11-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP14]]
|
||||
// CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 3
|
||||
// CHECK11-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group !14
|
||||
// CHECK11-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group [[ACC_GRP14]]
|
||||
// CHECK11-NEXT: [[CONV11:%.*]] = fpext float [[TMP21]] to double
|
||||
// CHECK11-NEXT: [[ADD12:%.*]] = fadd double [[CONV11]], 1.000000e+00
|
||||
// CHECK11-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float
|
||||
// CHECK11-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group !14
|
||||
// CHECK11-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group [[ACC_GRP14]]
|
||||
// CHECK11-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i32 0, i32 1
|
||||
// CHECK11-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX14]], i32 0, i32 2
|
||||
// CHECK11-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group !14
|
||||
// CHECK11-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group [[ACC_GRP14]]
|
||||
// CHECK11-NEXT: [[ADD16:%.*]] = fadd double [[TMP22]], 1.000000e+00
|
||||
// CHECK11-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group !14
|
||||
// CHECK11-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group [[ACC_GRP14]]
|
||||
// CHECK11-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP5]]
|
||||
// CHECK11-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP6]], i32 [[TMP23]]
|
||||
// CHECK11-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX17]], i32 3
|
||||
// CHECK11-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group !14
|
||||
// CHECK11-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group [[ACC_GRP14]]
|
||||
// CHECK11-NEXT: [[ADD19:%.*]] = fadd double [[TMP24]], 1.000000e+00
|
||||
// CHECK11-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group !14
|
||||
// CHECK11-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group [[ACC_GRP14]]
|
||||
// CHECK11-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
|
||||
// CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group !14
|
||||
// CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group [[ACC_GRP14]]
|
||||
// CHECK11-NEXT: [[ADD20:%.*]] = add nsw i64 [[TMP25]], 1
|
||||
// CHECK11-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group !14
|
||||
// CHECK11-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group [[ACC_GRP14]]
|
||||
// CHECK11-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
|
||||
// CHECK11-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group !14
|
||||
// CHECK11-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group [[ACC_GRP14]]
|
||||
// CHECK11-NEXT: [[CONV21:%.*]] = sext i8 [[TMP26]] to i32
|
||||
// CHECK11-NEXT: [[ADD22:%.*]] = add nsw i32 [[CONV21]], 1
|
||||
// CHECK11-NEXT: [[CONV23:%.*]] = trunc i32 [[ADD22]] to i8
|
||||
// CHECK11-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group !14
|
||||
// CHECK11-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group [[ACC_GRP14]]
|
||||
// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
|
||||
// CHECK11: omp.body.continue:
|
||||
// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
|
||||
// CHECK11: omp.inner.for.inc:
|
||||
// CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
|
||||
// CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
|
||||
// CHECK11-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP27]], 1
|
||||
// CHECK11-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
|
||||
// CHECK11-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
|
||||
// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
|
||||
// CHECK11: omp.inner.for.end:
|
||||
// CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -556,8 +556,8 @@ void test_omp_all_memory()
|
|||
// CHECK1-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !12
|
||||
// CHECK1-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !12
|
||||
// CHECK1-NEXT: [[TMP10:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !12
|
||||
// CHECK1-NEXT: store i32 15, i32* @a, align 4
|
||||
// CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* @a, align 4
|
||||
// CHECK1-NEXT: store i32 15, i32* @a, align 4, !noalias !12
|
||||
// CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* @a, align 4, !noalias !12
|
||||
// CHECK1-NEXT: [[CONV_I:%.*]] = trunc i32 [[TMP11]] to i8
|
||||
// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP10]], i32 0, i32 0
|
||||
// CHECK1-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
|
||||
|
@ -602,7 +602,7 @@ void test_omp_all_memory()
|
|||
// CHECK1-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !22
|
||||
// CHECK1-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !22
|
||||
// CHECK1-NEXT: [[TMP10:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !22
|
||||
// CHECK1-NEXT: store i32 15, i32* @a, align 4
|
||||
// CHECK1-NEXT: store i32 15, i32* @a, align 4, !noalias !22
|
||||
// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP10]], i32 0, i32 0
|
||||
// CHECK1-NEXT: [[TMP12:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[TMP11]], align 8
|
||||
// CHECK1-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP12]], i64 0, i64 1
|
||||
|
@ -663,7 +663,7 @@ void test_omp_all_memory()
|
|||
// CHECK1: .untied.jmp.1.i:
|
||||
// CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !32
|
||||
// CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP17]], [8 x i32]* @.gomp_critical_user_.var) #[[ATTR4]]
|
||||
// CHECK1-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK1-NEXT: store i32 1, i32* @a, align 4, !noalias !32
|
||||
// CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP17]], [8 x i32]* @.gomp_critical_user_.var) #[[ATTR4]]
|
||||
// CHECK1-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !32
|
||||
// CHECK1-NEXT: br label [[CLEANUP_I]]
|
||||
|
@ -724,7 +724,7 @@ void test_omp_all_memory()
|
|||
// CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]], i8* [[TMP15]]) #[[ATTR4]]
|
||||
// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
|
||||
// CHECK1: .untied.jmp.1.i:
|
||||
// CHECK1-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK1-NEXT: store i32 1, i32* @a, align 4, !noalias !42
|
||||
// CHECK1-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !42
|
||||
// CHECK1-NEXT: br label [[CLEANUP_I]]
|
||||
// CHECK1: cleanup.i:
|
||||
|
@ -784,7 +784,7 @@ void test_omp_all_memory()
|
|||
// CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]], i8* [[TMP15]]) #[[ATTR4]]
|
||||
// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT:%.*]]
|
||||
// CHECK1: .untied.jmp.1.i:
|
||||
// CHECK1-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK1-NEXT: store i32 1, i32* @a, align 4, !noalias !52
|
||||
// CHECK1-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !52
|
||||
// CHECK1-NEXT: br label [[CLEANUP_I]]
|
||||
// CHECK1: cleanup.i:
|
||||
|
@ -826,7 +826,7 @@ void test_omp_all_memory()
|
|||
// CHECK1-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !62
|
||||
// CHECK1-NEXT: store %struct.anon.8* [[TMP8]], %struct.anon.8** [[__CONTEXT_ADDR_I]], align 8, !noalias !62
|
||||
// CHECK1-NEXT: [[TMP10:%.*]] = load %struct.anon.8*, %struct.anon.8** [[__CONTEXT_ADDR_I]], align 8, !noalias !62
|
||||
// CHECK1-NEXT: store i32 2, i32* @a, align 4
|
||||
// CHECK1-NEXT: store i32 2, i32* @a, align 4, !noalias !62
|
||||
// CHECK1-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -862,7 +862,7 @@ void test_omp_all_memory()
|
|||
// CHECK1-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !72
|
||||
// CHECK1-NEXT: store %struct.anon.10* [[TMP8]], %struct.anon.10** [[__CONTEXT_ADDR_I]], align 8, !noalias !72
|
||||
// CHECK1-NEXT: [[TMP10:%.*]] = load %struct.anon.10*, %struct.anon.10** [[__CONTEXT_ADDR_I]], align 8, !noalias !72
|
||||
// CHECK1-NEXT: store i32 2, i32* @a, align 4
|
||||
// CHECK1-NEXT: store i32 2, i32* @a, align 4, !noalias !72
|
||||
// CHECK1-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -898,7 +898,7 @@ void test_omp_all_memory()
|
|||
// CHECK1-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !82
|
||||
// CHECK1-NEXT: store %struct.anon.12* [[TMP8]], %struct.anon.12** [[__CONTEXT_ADDR_I]], align 8, !noalias !82
|
||||
// CHECK1-NEXT: [[TMP10:%.*]] = load %struct.anon.12*, %struct.anon.12** [[__CONTEXT_ADDR_I]], align 8, !noalias !82
|
||||
// CHECK1-NEXT: store i32 3, i32* @a, align 4
|
||||
// CHECK1-NEXT: store i32 3, i32* @a, align 4, !noalias !82
|
||||
// CHECK1-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -934,7 +934,7 @@ void test_omp_all_memory()
|
|||
// CHECK1-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !92
|
||||
// CHECK1-NEXT: store %struct.anon.14* [[TMP8]], %struct.anon.14** [[__CONTEXT_ADDR_I]], align 8, !noalias !92
|
||||
// CHECK1-NEXT: [[TMP10:%.*]] = load %struct.anon.14*, %struct.anon.14** [[__CONTEXT_ADDR_I]], align 8, !noalias !92
|
||||
// CHECK1-NEXT: store i32 4, i32* @a, align 4
|
||||
// CHECK1-NEXT: store i32 4, i32* @a, align 4, !noalias !92
|
||||
// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_14:%.*]], %struct.anon.14* [[TMP10]], i32 0, i32 0
|
||||
// CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[TMP11]], align 8
|
||||
// CHECK1-NEXT: store i32 5, i32* [[TMP12]], align 128
|
||||
|
@ -996,7 +996,7 @@ void test_omp_all_memory()
|
|||
// CHECK1-NEXT: call void [[TMP15]](i8* [[TMP14]], i32** [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
|
||||
// CHECK1-NEXT: [[TMP16:%.*]] = load i32*, i32** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !102
|
||||
// CHECK1-NEXT: store i32 4, i32* [[TMP16]], align 128
|
||||
// CHECK1-NEXT: store i32 4, i32* @a, align 4
|
||||
// CHECK1-NEXT: store i32 4, i32* @a, align 4, !noalias !102
|
||||
// CHECK1-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -1748,8 +1748,8 @@ void test_omp_all_memory()
|
|||
// CHECK2-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !12
|
||||
// CHECK2-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !12
|
||||
// CHECK2-NEXT: [[TMP10:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !12
|
||||
// CHECK2-NEXT: store i32 15, i32* @a, align 4
|
||||
// CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* @a, align 4
|
||||
// CHECK2-NEXT: store i32 15, i32* @a, align 4, !noalias !12
|
||||
// CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* @a, align 4, !noalias !12
|
||||
// CHECK2-NEXT: [[CONV_I:%.*]] = trunc i32 [[TMP11]] to i8
|
||||
// CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP10]], i32 0, i32 0
|
||||
// CHECK2-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
|
||||
|
@ -1794,7 +1794,7 @@ void test_omp_all_memory()
|
|||
// CHECK2-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !22
|
||||
// CHECK2-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !22
|
||||
// CHECK2-NEXT: [[TMP10:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !22
|
||||
// CHECK2-NEXT: store i32 15, i32* @a, align 4
|
||||
// CHECK2-NEXT: store i32 15, i32* @a, align 4, !noalias !22
|
||||
// CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP10]], i32 0, i32 0
|
||||
// CHECK2-NEXT: [[TMP12:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[TMP11]], align 8
|
||||
// CHECK2-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP12]], i64 0, i64 1
|
||||
|
@ -1855,7 +1855,7 @@ void test_omp_all_memory()
|
|||
// CHECK2: .untied.jmp.1.i:
|
||||
// CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !32
|
||||
// CHECK2-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP17]], [8 x i32]* @.gomp_critical_user_.var) #[[ATTR4]]
|
||||
// CHECK2-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK2-NEXT: store i32 1, i32* @a, align 4, !noalias !32
|
||||
// CHECK2-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP17]], [8 x i32]* @.gomp_critical_user_.var) #[[ATTR4]]
|
||||
// CHECK2-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !32
|
||||
// CHECK2-NEXT: br label [[CLEANUP_I]]
|
||||
|
@ -1916,7 +1916,7 @@ void test_omp_all_memory()
|
|||
// CHECK2-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]], i8* [[TMP15]]) #[[ATTR4]]
|
||||
// CHECK2-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
|
||||
// CHECK2: .untied.jmp.1.i:
|
||||
// CHECK2-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK2-NEXT: store i32 1, i32* @a, align 4, !noalias !42
|
||||
// CHECK2-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !42
|
||||
// CHECK2-NEXT: br label [[CLEANUP_I]]
|
||||
// CHECK2: cleanup.i:
|
||||
|
@ -1976,7 +1976,7 @@ void test_omp_all_memory()
|
|||
// CHECK2-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]], i8* [[TMP15]]) #[[ATTR4]]
|
||||
// CHECK2-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT:%.*]]
|
||||
// CHECK2: .untied.jmp.1.i:
|
||||
// CHECK2-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK2-NEXT: store i32 1, i32* @a, align 4, !noalias !52
|
||||
// CHECK2-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !52
|
||||
// CHECK2-NEXT: br label [[CLEANUP_I]]
|
||||
// CHECK2: cleanup.i:
|
||||
|
@ -2018,7 +2018,7 @@ void test_omp_all_memory()
|
|||
// CHECK2-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !62
|
||||
// CHECK2-NEXT: store %struct.anon.8* [[TMP8]], %struct.anon.8** [[__CONTEXT_ADDR_I]], align 8, !noalias !62
|
||||
// CHECK2-NEXT: [[TMP10:%.*]] = load %struct.anon.8*, %struct.anon.8** [[__CONTEXT_ADDR_I]], align 8, !noalias !62
|
||||
// CHECK2-NEXT: store i32 2, i32* @a, align 4
|
||||
// CHECK2-NEXT: store i32 2, i32* @a, align 4, !noalias !62
|
||||
// CHECK2-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -2054,7 +2054,7 @@ void test_omp_all_memory()
|
|||
// CHECK2-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !72
|
||||
// CHECK2-NEXT: store %struct.anon.10* [[TMP8]], %struct.anon.10** [[__CONTEXT_ADDR_I]], align 8, !noalias !72
|
||||
// CHECK2-NEXT: [[TMP10:%.*]] = load %struct.anon.10*, %struct.anon.10** [[__CONTEXT_ADDR_I]], align 8, !noalias !72
|
||||
// CHECK2-NEXT: store i32 2, i32* @a, align 4
|
||||
// CHECK2-NEXT: store i32 2, i32* @a, align 4, !noalias !72
|
||||
// CHECK2-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -2090,7 +2090,7 @@ void test_omp_all_memory()
|
|||
// CHECK2-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !82
|
||||
// CHECK2-NEXT: store %struct.anon.12* [[TMP8]], %struct.anon.12** [[__CONTEXT_ADDR_I]], align 8, !noalias !82
|
||||
// CHECK2-NEXT: [[TMP10:%.*]] = load %struct.anon.12*, %struct.anon.12** [[__CONTEXT_ADDR_I]], align 8, !noalias !82
|
||||
// CHECK2-NEXT: store i32 3, i32* @a, align 4
|
||||
// CHECK2-NEXT: store i32 3, i32* @a, align 4, !noalias !82
|
||||
// CHECK2-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -2126,7 +2126,7 @@ void test_omp_all_memory()
|
|||
// CHECK2-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !92
|
||||
// CHECK2-NEXT: store %struct.anon.14* [[TMP8]], %struct.anon.14** [[__CONTEXT_ADDR_I]], align 8, !noalias !92
|
||||
// CHECK2-NEXT: [[TMP10:%.*]] = load %struct.anon.14*, %struct.anon.14** [[__CONTEXT_ADDR_I]], align 8, !noalias !92
|
||||
// CHECK2-NEXT: store i32 4, i32* @a, align 4
|
||||
// CHECK2-NEXT: store i32 4, i32* @a, align 4, !noalias !92
|
||||
// CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_14:%.*]], %struct.anon.14* [[TMP10]], i32 0, i32 0
|
||||
// CHECK2-NEXT: [[TMP12:%.*]] = load i32*, i32** [[TMP11]], align 8
|
||||
// CHECK2-NEXT: store i32 5, i32* [[TMP12]], align 128
|
||||
|
@ -2188,7 +2188,7 @@ void test_omp_all_memory()
|
|||
// CHECK2-NEXT: call void [[TMP15]](i8* [[TMP14]], i32** [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
|
||||
// CHECK2-NEXT: [[TMP16:%.*]] = load i32*, i32** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !102
|
||||
// CHECK2-NEXT: store i32 4, i32* [[TMP16]], align 128
|
||||
// CHECK2-NEXT: store i32 4, i32* @a, align 4
|
||||
// CHECK2-NEXT: store i32 4, i32* @a, align 4, !noalias !102
|
||||
// CHECK2-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -2990,8 +2990,8 @@ void test_omp_all_memory()
|
|||
// CHECK2-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !12
|
||||
// CHECK2-51-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !12
|
||||
// CHECK2-51-NEXT: [[TMP10:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !12
|
||||
// CHECK2-51-NEXT: store i32 15, i32* @a, align 4
|
||||
// CHECK2-51-NEXT: [[TMP11:%.*]] = load i32, i32* @a, align 4
|
||||
// CHECK2-51-NEXT: store i32 15, i32* @a, align 4, !noalias !12
|
||||
// CHECK2-51-NEXT: [[TMP11:%.*]] = load i32, i32* @a, align 4, !noalias !12
|
||||
// CHECK2-51-NEXT: [[CONV_I:%.*]] = trunc i32 [[TMP11]] to i8
|
||||
// CHECK2-51-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP10]], i32 0, i32 0
|
||||
// CHECK2-51-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
|
||||
|
@ -3036,7 +3036,7 @@ void test_omp_all_memory()
|
|||
// CHECK2-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !22
|
||||
// CHECK2-51-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !22
|
||||
// CHECK2-51-NEXT: [[TMP10:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !22
|
||||
// CHECK2-51-NEXT: store i32 15, i32* @a, align 4
|
||||
// CHECK2-51-NEXT: store i32 15, i32* @a, align 4, !noalias !22
|
||||
// CHECK2-51-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP10]], i32 0, i32 0
|
||||
// CHECK2-51-NEXT: [[TMP12:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[TMP11]], align 8
|
||||
// CHECK2-51-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP12]], i64 0, i64 1
|
||||
|
@ -3097,7 +3097,7 @@ void test_omp_all_memory()
|
|||
// CHECK2-51: .untied.jmp.1.i:
|
||||
// CHECK2-51-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !32
|
||||
// CHECK2-51-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP17]], [8 x i32]* @.gomp_critical_user_.var) #[[ATTR4]]
|
||||
// CHECK2-51-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK2-51-NEXT: store i32 1, i32* @a, align 4, !noalias !32
|
||||
// CHECK2-51-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP17]], [8 x i32]* @.gomp_critical_user_.var) #[[ATTR4]]
|
||||
// CHECK2-51-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !32
|
||||
// CHECK2-51-NEXT: br label [[CLEANUP_I]]
|
||||
|
@ -3158,7 +3158,7 @@ void test_omp_all_memory()
|
|||
// CHECK2-51-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]], i8* [[TMP15]]) #[[ATTR4]]
|
||||
// CHECK2-51-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
|
||||
// CHECK2-51: .untied.jmp.1.i:
|
||||
// CHECK2-51-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK2-51-NEXT: store i32 1, i32* @a, align 4, !noalias !42
|
||||
// CHECK2-51-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !42
|
||||
// CHECK2-51-NEXT: br label [[CLEANUP_I]]
|
||||
// CHECK2-51: cleanup.i:
|
||||
|
@ -3218,7 +3218,7 @@ void test_omp_all_memory()
|
|||
// CHECK2-51-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]], i8* [[TMP15]]) #[[ATTR4]]
|
||||
// CHECK2-51-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT:%.*]]
|
||||
// CHECK2-51: .untied.jmp.1.i:
|
||||
// CHECK2-51-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK2-51-NEXT: store i32 1, i32* @a, align 4, !noalias !52
|
||||
// CHECK2-51-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !52
|
||||
// CHECK2-51-NEXT: br label [[CLEANUP_I]]
|
||||
// CHECK2-51: cleanup.i:
|
||||
|
@ -3260,7 +3260,7 @@ void test_omp_all_memory()
|
|||
// CHECK2-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !62
|
||||
// CHECK2-51-NEXT: store %struct.anon.8* [[TMP8]], %struct.anon.8** [[__CONTEXT_ADDR_I]], align 8, !noalias !62
|
||||
// CHECK2-51-NEXT: [[TMP10:%.*]] = load %struct.anon.8*, %struct.anon.8** [[__CONTEXT_ADDR_I]], align 8, !noalias !62
|
||||
// CHECK2-51-NEXT: store i32 2, i32* @a, align 4
|
||||
// CHECK2-51-NEXT: store i32 2, i32* @a, align 4, !noalias !62
|
||||
// CHECK2-51-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -3296,7 +3296,7 @@ void test_omp_all_memory()
|
|||
// CHECK2-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !72
|
||||
// CHECK2-51-NEXT: store %struct.anon.10* [[TMP8]], %struct.anon.10** [[__CONTEXT_ADDR_I]], align 8, !noalias !72
|
||||
// CHECK2-51-NEXT: [[TMP10:%.*]] = load %struct.anon.10*, %struct.anon.10** [[__CONTEXT_ADDR_I]], align 8, !noalias !72
|
||||
// CHECK2-51-NEXT: store i32 2, i32* @a, align 4
|
||||
// CHECK2-51-NEXT: store i32 2, i32* @a, align 4, !noalias !72
|
||||
// CHECK2-51-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -3332,7 +3332,7 @@ void test_omp_all_memory()
|
|||
// CHECK2-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !82
|
||||
// CHECK2-51-NEXT: store %struct.anon.12* [[TMP8]], %struct.anon.12** [[__CONTEXT_ADDR_I]], align 8, !noalias !82
|
||||
// CHECK2-51-NEXT: [[TMP10:%.*]] = load %struct.anon.12*, %struct.anon.12** [[__CONTEXT_ADDR_I]], align 8, !noalias !82
|
||||
// CHECK2-51-NEXT: store i32 2, i32* @a, align 4
|
||||
// CHECK2-51-NEXT: store i32 2, i32* @a, align 4, !noalias !82
|
||||
// CHECK2-51-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -3368,7 +3368,7 @@ void test_omp_all_memory()
|
|||
// CHECK2-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !92
|
||||
// CHECK2-51-NEXT: store %struct.anon.14* [[TMP8]], %struct.anon.14** [[__CONTEXT_ADDR_I]], align 8, !noalias !92
|
||||
// CHECK2-51-NEXT: [[TMP10:%.*]] = load %struct.anon.14*, %struct.anon.14** [[__CONTEXT_ADDR_I]], align 8, !noalias !92
|
||||
// CHECK2-51-NEXT: store i32 3, i32* @a, align 4
|
||||
// CHECK2-51-NEXT: store i32 3, i32* @a, align 4, !noalias !92
|
||||
// CHECK2-51-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -3404,7 +3404,7 @@ void test_omp_all_memory()
|
|||
// CHECK2-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !102
|
||||
// CHECK2-51-NEXT: store %struct.anon.16* [[TMP8]], %struct.anon.16** [[__CONTEXT_ADDR_I]], align 8, !noalias !102
|
||||
// CHECK2-51-NEXT: [[TMP10:%.*]] = load %struct.anon.16*, %struct.anon.16** [[__CONTEXT_ADDR_I]], align 8, !noalias !102
|
||||
// CHECK2-51-NEXT: store i32 4, i32* @a, align 4
|
||||
// CHECK2-51-NEXT: store i32 4, i32* @a, align 4, !noalias !102
|
||||
// CHECK2-51-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_16:%.*]], %struct.anon.16* [[TMP10]], i32 0, i32 0
|
||||
// CHECK2-51-NEXT: [[TMP12:%.*]] = load i32*, i32** [[TMP11]], align 8
|
||||
// CHECK2-51-NEXT: store i32 5, i32* [[TMP12]], align 128
|
||||
|
@ -3466,7 +3466,7 @@ void test_omp_all_memory()
|
|||
// CHECK2-51-NEXT: call void [[TMP15]](i8* [[TMP14]], i32** [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
|
||||
// CHECK2-51-NEXT: [[TMP16:%.*]] = load i32*, i32** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !112
|
||||
// CHECK2-51-NEXT: store i32 4, i32* [[TMP16]], align 128
|
||||
// CHECK2-51-NEXT: store i32 4, i32* @a, align 4
|
||||
// CHECK2-51-NEXT: store i32 4, i32* @a, align 4, !noalias !112
|
||||
// CHECK2-51-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -4676,8 +4676,8 @@ void test_omp_all_memory()
|
|||
// CHECK3-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !12
|
||||
// CHECK3-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !12
|
||||
// CHECK3-NEXT: [[TMP10:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !12
|
||||
// CHECK3-NEXT: store i32 15, i32* @a, align 4
|
||||
// CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* @a, align 4
|
||||
// CHECK3-NEXT: store i32 15, i32* @a, align 4, !noalias !12
|
||||
// CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* @a, align 4, !noalias !12
|
||||
// CHECK3-NEXT: [[CONV_I:%.*]] = trunc i32 [[TMP11]] to i8
|
||||
// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP10]], i32 0, i32 0
|
||||
// CHECK3-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
|
||||
|
@ -4722,7 +4722,7 @@ void test_omp_all_memory()
|
|||
// CHECK3-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !22
|
||||
// CHECK3-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !22
|
||||
// CHECK3-NEXT: [[TMP10:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !22
|
||||
// CHECK3-NEXT: store i32 15, i32* @a, align 4
|
||||
// CHECK3-NEXT: store i32 15, i32* @a, align 4, !noalias !22
|
||||
// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP10]], i32 0, i32 0
|
||||
// CHECK3-NEXT: [[TMP12:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[TMP11]], align 8
|
||||
// CHECK3-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP12]], i64 0, i64 1
|
||||
|
@ -4783,7 +4783,7 @@ void test_omp_all_memory()
|
|||
// CHECK3: .untied.jmp.1.i:
|
||||
// CHECK3-NEXT: [[OMP_GLOBAL_THREAD_NUM2_I:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR4]]
|
||||
// CHECK3-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM2_I]], [8 x i32]* @.gomp_critical_user_.var) #[[ATTR4]]
|
||||
// CHECK3-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK3-NEXT: store i32 1, i32* @a, align 4, !noalias !32
|
||||
// CHECK3-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM2_I]], [8 x i32]* @.gomp_critical_user_.var) #[[ATTR4]]
|
||||
// CHECK3-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !32
|
||||
// CHECK3-NEXT: br label [[CLEANUP_I]]
|
||||
|
@ -4844,7 +4844,7 @@ void test_omp_all_memory()
|
|||
// CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], i8* [[TMP14]]) #[[ATTR4]]
|
||||
// CHECK3-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
|
||||
// CHECK3: .untied.jmp.1.i:
|
||||
// CHECK3-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK3-NEXT: store i32 1, i32* @a, align 4, !noalias !42
|
||||
// CHECK3-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !42
|
||||
// CHECK3-NEXT: br label [[CLEANUP_I]]
|
||||
// CHECK3: cleanup.i:
|
||||
|
@ -4904,7 +4904,7 @@ void test_omp_all_memory()
|
|||
// CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], i8* [[TMP14]]) #[[ATTR4]]
|
||||
// CHECK3-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT:%.*]]
|
||||
// CHECK3: .untied.jmp.1.i:
|
||||
// CHECK3-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK3-NEXT: store i32 1, i32* @a, align 4, !noalias !52
|
||||
// CHECK3-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !52
|
||||
// CHECK3-NEXT: br label [[CLEANUP_I]]
|
||||
// CHECK3: cleanup.i:
|
||||
|
@ -4946,7 +4946,7 @@ void test_omp_all_memory()
|
|||
// CHECK3-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !62
|
||||
// CHECK3-NEXT: store %struct.anon.8* [[TMP8]], %struct.anon.8** [[__CONTEXT_ADDR_I]], align 8, !noalias !62
|
||||
// CHECK3-NEXT: [[TMP10:%.*]] = load %struct.anon.8*, %struct.anon.8** [[__CONTEXT_ADDR_I]], align 8, !noalias !62
|
||||
// CHECK3-NEXT: store i32 2, i32* @a, align 4
|
||||
// CHECK3-NEXT: store i32 2, i32* @a, align 4, !noalias !62
|
||||
// CHECK3-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -4982,7 +4982,7 @@ void test_omp_all_memory()
|
|||
// CHECK3-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !72
|
||||
// CHECK3-NEXT: store %struct.anon.10* [[TMP8]], %struct.anon.10** [[__CONTEXT_ADDR_I]], align 8, !noalias !72
|
||||
// CHECK3-NEXT: [[TMP10:%.*]] = load %struct.anon.10*, %struct.anon.10** [[__CONTEXT_ADDR_I]], align 8, !noalias !72
|
||||
// CHECK3-NEXT: store i32 2, i32* @a, align 4
|
||||
// CHECK3-NEXT: store i32 2, i32* @a, align 4, !noalias !72
|
||||
// CHECK3-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -5018,7 +5018,7 @@ void test_omp_all_memory()
|
|||
// CHECK3-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !82
|
||||
// CHECK3-NEXT: store %struct.anon.12* [[TMP8]], %struct.anon.12** [[__CONTEXT_ADDR_I]], align 8, !noalias !82
|
||||
// CHECK3-NEXT: [[TMP10:%.*]] = load %struct.anon.12*, %struct.anon.12** [[__CONTEXT_ADDR_I]], align 8, !noalias !82
|
||||
// CHECK3-NEXT: store i32 3, i32* @a, align 4
|
||||
// CHECK3-NEXT: store i32 3, i32* @a, align 4, !noalias !82
|
||||
// CHECK3-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -5054,7 +5054,7 @@ void test_omp_all_memory()
|
|||
// CHECK3-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !92
|
||||
// CHECK3-NEXT: store %struct.anon.14* [[TMP8]], %struct.anon.14** [[__CONTEXT_ADDR_I]], align 8, !noalias !92
|
||||
// CHECK3-NEXT: [[TMP10:%.*]] = load %struct.anon.14*, %struct.anon.14** [[__CONTEXT_ADDR_I]], align 8, !noalias !92
|
||||
// CHECK3-NEXT: store i32 4, i32* @a, align 4
|
||||
// CHECK3-NEXT: store i32 4, i32* @a, align 4, !noalias !92
|
||||
// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_14:%.*]], %struct.anon.14* [[TMP10]], i32 0, i32 0
|
||||
// CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[TMP11]], align 8
|
||||
// CHECK3-NEXT: store i32 5, i32* [[TMP12]], align 128
|
||||
|
@ -5116,7 +5116,7 @@ void test_omp_all_memory()
|
|||
// CHECK3-NEXT: call void [[TMP15]](i8* [[TMP14]], i32** [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
|
||||
// CHECK3-NEXT: [[TMP16:%.*]] = load i32*, i32** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !102
|
||||
// CHECK3-NEXT: store i32 4, i32* [[TMP16]], align 128
|
||||
// CHECK3-NEXT: store i32 4, i32* @a, align 4
|
||||
// CHECK3-NEXT: store i32 4, i32* @a, align 4, !noalias !102
|
||||
// CHECK3-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -5755,8 +5755,8 @@ void test_omp_all_memory()
|
|||
// CHECK4-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !12
|
||||
// CHECK4-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !12
|
||||
// CHECK4-NEXT: [[TMP10:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !12
|
||||
// CHECK4-NEXT: store i32 15, i32* @a, align 4
|
||||
// CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* @a, align 4
|
||||
// CHECK4-NEXT: store i32 15, i32* @a, align 4, !noalias !12
|
||||
// CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* @a, align 4, !noalias !12
|
||||
// CHECK4-NEXT: [[CONV_I:%.*]] = trunc i32 [[TMP11]] to i8
|
||||
// CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP10]], i32 0, i32 0
|
||||
// CHECK4-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
|
||||
|
@ -5801,7 +5801,7 @@ void test_omp_all_memory()
|
|||
// CHECK4-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !22
|
||||
// CHECK4-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !22
|
||||
// CHECK4-NEXT: [[TMP10:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !22
|
||||
// CHECK4-NEXT: store i32 15, i32* @a, align 4
|
||||
// CHECK4-NEXT: store i32 15, i32* @a, align 4, !noalias !22
|
||||
// CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP10]], i32 0, i32 0
|
||||
// CHECK4-NEXT: [[TMP12:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[TMP11]], align 8
|
||||
// CHECK4-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP12]], i64 0, i64 1
|
||||
|
@ -5862,7 +5862,7 @@ void test_omp_all_memory()
|
|||
// CHECK4: .untied.jmp.1.i:
|
||||
// CHECK4-NEXT: [[OMP_GLOBAL_THREAD_NUM2_I:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR4]]
|
||||
// CHECK4-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM2_I]], [8 x i32]* @.gomp_critical_user_.var) #[[ATTR4]]
|
||||
// CHECK4-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK4-NEXT: store i32 1, i32* @a, align 4, !noalias !32
|
||||
// CHECK4-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM2_I]], [8 x i32]* @.gomp_critical_user_.var) #[[ATTR4]]
|
||||
// CHECK4-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !32
|
||||
// CHECK4-NEXT: br label [[CLEANUP_I]]
|
||||
|
@ -5923,7 +5923,7 @@ void test_omp_all_memory()
|
|||
// CHECK4-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], i8* [[TMP14]]) #[[ATTR4]]
|
||||
// CHECK4-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
|
||||
// CHECK4: .untied.jmp.1.i:
|
||||
// CHECK4-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK4-NEXT: store i32 1, i32* @a, align 4, !noalias !42
|
||||
// CHECK4-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !42
|
||||
// CHECK4-NEXT: br label [[CLEANUP_I]]
|
||||
// CHECK4: cleanup.i:
|
||||
|
@ -5983,7 +5983,7 @@ void test_omp_all_memory()
|
|||
// CHECK4-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], i8* [[TMP14]]) #[[ATTR4]]
|
||||
// CHECK4-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT:%.*]]
|
||||
// CHECK4: .untied.jmp.1.i:
|
||||
// CHECK4-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK4-NEXT: store i32 1, i32* @a, align 4, !noalias !52
|
||||
// CHECK4-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !52
|
||||
// CHECK4-NEXT: br label [[CLEANUP_I]]
|
||||
// CHECK4: cleanup.i:
|
||||
|
@ -6025,7 +6025,7 @@ void test_omp_all_memory()
|
|||
// CHECK4-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !62
|
||||
// CHECK4-NEXT: store %struct.anon.8* [[TMP8]], %struct.anon.8** [[__CONTEXT_ADDR_I]], align 8, !noalias !62
|
||||
// CHECK4-NEXT: [[TMP10:%.*]] = load %struct.anon.8*, %struct.anon.8** [[__CONTEXT_ADDR_I]], align 8, !noalias !62
|
||||
// CHECK4-NEXT: store i32 2, i32* @a, align 4
|
||||
// CHECK4-NEXT: store i32 2, i32* @a, align 4, !noalias !62
|
||||
// CHECK4-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -6061,7 +6061,7 @@ void test_omp_all_memory()
|
|||
// CHECK4-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !72
|
||||
// CHECK4-NEXT: store %struct.anon.10* [[TMP8]], %struct.anon.10** [[__CONTEXT_ADDR_I]], align 8, !noalias !72
|
||||
// CHECK4-NEXT: [[TMP10:%.*]] = load %struct.anon.10*, %struct.anon.10** [[__CONTEXT_ADDR_I]], align 8, !noalias !72
|
||||
// CHECK4-NEXT: store i32 2, i32* @a, align 4
|
||||
// CHECK4-NEXT: store i32 2, i32* @a, align 4, !noalias !72
|
||||
// CHECK4-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -6097,7 +6097,7 @@ void test_omp_all_memory()
|
|||
// CHECK4-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !82
|
||||
// CHECK4-NEXT: store %struct.anon.12* [[TMP8]], %struct.anon.12** [[__CONTEXT_ADDR_I]], align 8, !noalias !82
|
||||
// CHECK4-NEXT: [[TMP10:%.*]] = load %struct.anon.12*, %struct.anon.12** [[__CONTEXT_ADDR_I]], align 8, !noalias !82
|
||||
// CHECK4-NEXT: store i32 3, i32* @a, align 4
|
||||
// CHECK4-NEXT: store i32 3, i32* @a, align 4, !noalias !82
|
||||
// CHECK4-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -6133,7 +6133,7 @@ void test_omp_all_memory()
|
|||
// CHECK4-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !92
|
||||
// CHECK4-NEXT: store %struct.anon.14* [[TMP8]], %struct.anon.14** [[__CONTEXT_ADDR_I]], align 8, !noalias !92
|
||||
// CHECK4-NEXT: [[TMP10:%.*]] = load %struct.anon.14*, %struct.anon.14** [[__CONTEXT_ADDR_I]], align 8, !noalias !92
|
||||
// CHECK4-NEXT: store i32 4, i32* @a, align 4
|
||||
// CHECK4-NEXT: store i32 4, i32* @a, align 4, !noalias !92
|
||||
// CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_14:%.*]], %struct.anon.14* [[TMP10]], i32 0, i32 0
|
||||
// CHECK4-NEXT: [[TMP12:%.*]] = load i32*, i32** [[TMP11]], align 8
|
||||
// CHECK4-NEXT: store i32 5, i32* [[TMP12]], align 128
|
||||
|
@ -6195,7 +6195,7 @@ void test_omp_all_memory()
|
|||
// CHECK4-NEXT: call void [[TMP15]](i8* [[TMP14]], i32** [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
|
||||
// CHECK4-NEXT: [[TMP16:%.*]] = load i32*, i32** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !102
|
||||
// CHECK4-NEXT: store i32 4, i32* [[TMP16]], align 128
|
||||
// CHECK4-NEXT: store i32 4, i32* @a, align 4
|
||||
// CHECK4-NEXT: store i32 4, i32* @a, align 4, !noalias !102
|
||||
// CHECK4-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -6886,8 +6886,8 @@ void test_omp_all_memory()
|
|||
// CHECK3-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !12
|
||||
// CHECK3-51-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !12
|
||||
// CHECK3-51-NEXT: [[TMP10:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !12
|
||||
// CHECK3-51-NEXT: store i32 15, i32* @a, align 4
|
||||
// CHECK3-51-NEXT: [[TMP11:%.*]] = load i32, i32* @a, align 4
|
||||
// CHECK3-51-NEXT: store i32 15, i32* @a, align 4, !noalias !12
|
||||
// CHECK3-51-NEXT: [[TMP11:%.*]] = load i32, i32* @a, align 4, !noalias !12
|
||||
// CHECK3-51-NEXT: [[CONV_I:%.*]] = trunc i32 [[TMP11]] to i8
|
||||
// CHECK3-51-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP10]], i32 0, i32 0
|
||||
// CHECK3-51-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
|
||||
|
@ -6932,7 +6932,7 @@ void test_omp_all_memory()
|
|||
// CHECK3-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !22
|
||||
// CHECK3-51-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !22
|
||||
// CHECK3-51-NEXT: [[TMP10:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !22
|
||||
// CHECK3-51-NEXT: store i32 15, i32* @a, align 4
|
||||
// CHECK3-51-NEXT: store i32 15, i32* @a, align 4, !noalias !22
|
||||
// CHECK3-51-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP10]], i32 0, i32 0
|
||||
// CHECK3-51-NEXT: [[TMP12:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[TMP11]], align 8
|
||||
// CHECK3-51-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP12]], i64 0, i64 1
|
||||
|
@ -6993,7 +6993,7 @@ void test_omp_all_memory()
|
|||
// CHECK3-51: .untied.jmp.1.i:
|
||||
// CHECK3-51-NEXT: [[OMP_GLOBAL_THREAD_NUM2_I:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR4]]
|
||||
// CHECK3-51-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM2_I]], [8 x i32]* @.gomp_critical_user_.var) #[[ATTR4]]
|
||||
// CHECK3-51-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK3-51-NEXT: store i32 1, i32* @a, align 4, !noalias !32
|
||||
// CHECK3-51-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM2_I]], [8 x i32]* @.gomp_critical_user_.var) #[[ATTR4]]
|
||||
// CHECK3-51-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !32
|
||||
// CHECK3-51-NEXT: br label [[CLEANUP_I]]
|
||||
|
@ -7054,7 +7054,7 @@ void test_omp_all_memory()
|
|||
// CHECK3-51-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], i8* [[TMP14]]) #[[ATTR4]]
|
||||
// CHECK3-51-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
|
||||
// CHECK3-51: .untied.jmp.1.i:
|
||||
// CHECK3-51-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK3-51-NEXT: store i32 1, i32* @a, align 4, !noalias !42
|
||||
// CHECK3-51-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !42
|
||||
// CHECK3-51-NEXT: br label [[CLEANUP_I]]
|
||||
// CHECK3-51: cleanup.i:
|
||||
|
@ -7114,7 +7114,7 @@ void test_omp_all_memory()
|
|||
// CHECK3-51-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], i8* [[TMP14]]) #[[ATTR4]]
|
||||
// CHECK3-51-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT:%.*]]
|
||||
// CHECK3-51: .untied.jmp.1.i:
|
||||
// CHECK3-51-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK3-51-NEXT: store i32 1, i32* @a, align 4, !noalias !52
|
||||
// CHECK3-51-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !52
|
||||
// CHECK3-51-NEXT: br label [[CLEANUP_I]]
|
||||
// CHECK3-51: cleanup.i:
|
||||
|
@ -7156,7 +7156,7 @@ void test_omp_all_memory()
|
|||
// CHECK3-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !62
|
||||
// CHECK3-51-NEXT: store %struct.anon.8* [[TMP8]], %struct.anon.8** [[__CONTEXT_ADDR_I]], align 8, !noalias !62
|
||||
// CHECK3-51-NEXT: [[TMP10:%.*]] = load %struct.anon.8*, %struct.anon.8** [[__CONTEXT_ADDR_I]], align 8, !noalias !62
|
||||
// CHECK3-51-NEXT: store i32 2, i32* @a, align 4
|
||||
// CHECK3-51-NEXT: store i32 2, i32* @a, align 4, !noalias !62
|
||||
// CHECK3-51-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -7192,7 +7192,7 @@ void test_omp_all_memory()
|
|||
// CHECK3-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !72
|
||||
// CHECK3-51-NEXT: store %struct.anon.10* [[TMP8]], %struct.anon.10** [[__CONTEXT_ADDR_I]], align 8, !noalias !72
|
||||
// CHECK3-51-NEXT: [[TMP10:%.*]] = load %struct.anon.10*, %struct.anon.10** [[__CONTEXT_ADDR_I]], align 8, !noalias !72
|
||||
// CHECK3-51-NEXT: store i32 2, i32* @a, align 4
|
||||
// CHECK3-51-NEXT: store i32 2, i32* @a, align 4, !noalias !72
|
||||
// CHECK3-51-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -7228,7 +7228,7 @@ void test_omp_all_memory()
|
|||
// CHECK3-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !82
|
||||
// CHECK3-51-NEXT: store %struct.anon.12* [[TMP8]], %struct.anon.12** [[__CONTEXT_ADDR_I]], align 8, !noalias !82
|
||||
// CHECK3-51-NEXT: [[TMP10:%.*]] = load %struct.anon.12*, %struct.anon.12** [[__CONTEXT_ADDR_I]], align 8, !noalias !82
|
||||
// CHECK3-51-NEXT: store i32 2, i32* @a, align 4
|
||||
// CHECK3-51-NEXT: store i32 2, i32* @a, align 4, !noalias !82
|
||||
// CHECK3-51-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -7264,7 +7264,7 @@ void test_omp_all_memory()
|
|||
// CHECK3-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !92
|
||||
// CHECK3-51-NEXT: store %struct.anon.14* [[TMP8]], %struct.anon.14** [[__CONTEXT_ADDR_I]], align 8, !noalias !92
|
||||
// CHECK3-51-NEXT: [[TMP10:%.*]] = load %struct.anon.14*, %struct.anon.14** [[__CONTEXT_ADDR_I]], align 8, !noalias !92
|
||||
// CHECK3-51-NEXT: store i32 3, i32* @a, align 4
|
||||
// CHECK3-51-NEXT: store i32 3, i32* @a, align 4, !noalias !92
|
||||
// CHECK3-51-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -7300,7 +7300,7 @@ void test_omp_all_memory()
|
|||
// CHECK3-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !102
|
||||
// CHECK3-51-NEXT: store %struct.anon.16* [[TMP8]], %struct.anon.16** [[__CONTEXT_ADDR_I]], align 8, !noalias !102
|
||||
// CHECK3-51-NEXT: [[TMP10:%.*]] = load %struct.anon.16*, %struct.anon.16** [[__CONTEXT_ADDR_I]], align 8, !noalias !102
|
||||
// CHECK3-51-NEXT: store i32 4, i32* @a, align 4
|
||||
// CHECK3-51-NEXT: store i32 4, i32* @a, align 4, !noalias !102
|
||||
// CHECK3-51-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_16:%.*]], %struct.anon.16* [[TMP10]], i32 0, i32 0
|
||||
// CHECK3-51-NEXT: [[TMP12:%.*]] = load i32*, i32** [[TMP11]], align 8
|
||||
// CHECK3-51-NEXT: store i32 5, i32* [[TMP12]], align 128
|
||||
|
@ -7362,7 +7362,7 @@ void test_omp_all_memory()
|
|||
// CHECK3-51-NEXT: call void [[TMP15]](i8* [[TMP14]], i32** [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
|
||||
// CHECK3-51-NEXT: [[TMP16:%.*]] = load i32*, i32** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !112
|
||||
// CHECK3-51-NEXT: store i32 4, i32* [[TMP16]], align 128
|
||||
// CHECK3-51-NEXT: store i32 4, i32* @a, align 4
|
||||
// CHECK3-51-NEXT: store i32 4, i32* @a, align 4, !noalias !112
|
||||
// CHECK3-51-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -8449,8 +8449,8 @@ void test_omp_all_memory()
|
|||
// CHECK4-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !12
|
||||
// CHECK4-51-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !12
|
||||
// CHECK4-51-NEXT: [[TMP10:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !12
|
||||
// CHECK4-51-NEXT: store i32 15, i32* @a, align 4
|
||||
// CHECK4-51-NEXT: [[TMP11:%.*]] = load i32, i32* @a, align 4
|
||||
// CHECK4-51-NEXT: store i32 15, i32* @a, align 4, !noalias !12
|
||||
// CHECK4-51-NEXT: [[TMP11:%.*]] = load i32, i32* @a, align 4, !noalias !12
|
||||
// CHECK4-51-NEXT: [[CONV_I:%.*]] = trunc i32 [[TMP11]] to i8
|
||||
// CHECK4-51-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP10]], i32 0, i32 0
|
||||
// CHECK4-51-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
|
||||
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@ -8495,7 +8495,7 @@ void test_omp_all_memory()
|
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// CHECK4-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !22
|
||||
// CHECK4-51-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !22
|
||||
// CHECK4-51-NEXT: [[TMP10:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !22
|
||||
// CHECK4-51-NEXT: store i32 15, i32* @a, align 4
|
||||
// CHECK4-51-NEXT: store i32 15, i32* @a, align 4, !noalias !22
|
||||
// CHECK4-51-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP10]], i32 0, i32 0
|
||||
// CHECK4-51-NEXT: [[TMP12:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[TMP11]], align 8
|
||||
// CHECK4-51-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP12]], i64 0, i64 1
|
||||
|
@ -8556,7 +8556,7 @@ void test_omp_all_memory()
|
|||
// CHECK4-51: .untied.jmp.1.i:
|
||||
// CHECK4-51-NEXT: [[OMP_GLOBAL_THREAD_NUM2_I:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR4]]
|
||||
// CHECK4-51-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM2_I]], [8 x i32]* @.gomp_critical_user_.var) #[[ATTR4]]
|
||||
// CHECK4-51-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK4-51-NEXT: store i32 1, i32* @a, align 4, !noalias !32
|
||||
// CHECK4-51-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM2_I]], [8 x i32]* @.gomp_critical_user_.var) #[[ATTR4]]
|
||||
// CHECK4-51-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !32
|
||||
// CHECK4-51-NEXT: br label [[CLEANUP_I]]
|
||||
|
@ -8617,7 +8617,7 @@ void test_omp_all_memory()
|
|||
// CHECK4-51-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], i8* [[TMP14]]) #[[ATTR4]]
|
||||
// CHECK4-51-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
|
||||
// CHECK4-51: .untied.jmp.1.i:
|
||||
// CHECK4-51-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK4-51-NEXT: store i32 1, i32* @a, align 4, !noalias !42
|
||||
// CHECK4-51-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !42
|
||||
// CHECK4-51-NEXT: br label [[CLEANUP_I]]
|
||||
// CHECK4-51: cleanup.i:
|
||||
|
@ -8677,7 +8677,7 @@ void test_omp_all_memory()
|
|||
// CHECK4-51-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], i8* [[TMP14]]) #[[ATTR4]]
|
||||
// CHECK4-51-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT:%.*]]
|
||||
// CHECK4-51: .untied.jmp.1.i:
|
||||
// CHECK4-51-NEXT: store i32 1, i32* @a, align 4
|
||||
// CHECK4-51-NEXT: store i32 1, i32* @a, align 4, !noalias !52
|
||||
// CHECK4-51-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT_I]], align 4, !noalias !52
|
||||
// CHECK4-51-NEXT: br label [[CLEANUP_I]]
|
||||
// CHECK4-51: cleanup.i:
|
||||
|
@ -8719,7 +8719,7 @@ void test_omp_all_memory()
|
|||
// CHECK4-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !62
|
||||
// CHECK4-51-NEXT: store %struct.anon.8* [[TMP8]], %struct.anon.8** [[__CONTEXT_ADDR_I]], align 8, !noalias !62
|
||||
// CHECK4-51-NEXT: [[TMP10:%.*]] = load %struct.anon.8*, %struct.anon.8** [[__CONTEXT_ADDR_I]], align 8, !noalias !62
|
||||
// CHECK4-51-NEXT: store i32 2, i32* @a, align 4
|
||||
// CHECK4-51-NEXT: store i32 2, i32* @a, align 4, !noalias !62
|
||||
// CHECK4-51-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -8755,7 +8755,7 @@ void test_omp_all_memory()
|
|||
// CHECK4-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !72
|
||||
// CHECK4-51-NEXT: store %struct.anon.10* [[TMP8]], %struct.anon.10** [[__CONTEXT_ADDR_I]], align 8, !noalias !72
|
||||
// CHECK4-51-NEXT: [[TMP10:%.*]] = load %struct.anon.10*, %struct.anon.10** [[__CONTEXT_ADDR_I]], align 8, !noalias !72
|
||||
// CHECK4-51-NEXT: store i32 2, i32* @a, align 4
|
||||
// CHECK4-51-NEXT: store i32 2, i32* @a, align 4, !noalias !72
|
||||
// CHECK4-51-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -8791,7 +8791,7 @@ void test_omp_all_memory()
|
|||
// CHECK4-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !82
|
||||
// CHECK4-51-NEXT: store %struct.anon.12* [[TMP8]], %struct.anon.12** [[__CONTEXT_ADDR_I]], align 8, !noalias !82
|
||||
// CHECK4-51-NEXT: [[TMP10:%.*]] = load %struct.anon.12*, %struct.anon.12** [[__CONTEXT_ADDR_I]], align 8, !noalias !82
|
||||
// CHECK4-51-NEXT: store i32 3, i32* @a, align 4
|
||||
// CHECK4-51-NEXT: store i32 3, i32* @a, align 4, !noalias !82
|
||||
// CHECK4-51-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
@ -8827,7 +8827,7 @@ void test_omp_all_memory()
|
|||
// CHECK4-51-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !92
|
||||
// CHECK4-51-NEXT: store %struct.anon.14* [[TMP8]], %struct.anon.14** [[__CONTEXT_ADDR_I]], align 8, !noalias !92
|
||||
// CHECK4-51-NEXT: [[TMP10:%.*]] = load %struct.anon.14*, %struct.anon.14** [[__CONTEXT_ADDR_I]], align 8, !noalias !92
|
||||
// CHECK4-51-NEXT: store i32 4, i32* @a, align 4
|
||||
// CHECK4-51-NEXT: store i32 4, i32* @a, align 4, !noalias !92
|
||||
// CHECK4-51-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_14:%.*]], %struct.anon.14* [[TMP10]], i32 0, i32 0
|
||||
// CHECK4-51-NEXT: [[TMP12:%.*]] = load i32*, i32** [[TMP11]], align 8
|
||||
// CHECK4-51-NEXT: store i32 5, i32* [[TMP12]], align 128
|
||||
|
@ -8889,7 +8889,7 @@ void test_omp_all_memory()
|
|||
// CHECK4-51-NEXT: call void [[TMP15]](i8* [[TMP14]], i32** [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
|
||||
// CHECK4-51-NEXT: [[TMP16:%.*]] = load i32*, i32** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !102
|
||||
// CHECK4-51-NEXT: store i32 4, i32* [[TMP16]], align 128
|
||||
// CHECK4-51-NEXT: store i32 4, i32* @a, align 4
|
||||
// CHECK4-51-NEXT: store i32 4, i32* @a, align 4, !noalias !102
|
||||
// CHECK4-51-NEXT: ret i32 0
|
||||
//
|
||||
//
|
||||
|
|
|
@ -859,7 +859,7 @@ int main(int argc, char **argv) {
|
|||
// CHECK1-NEXT: [[TMP36:%.*]] = sdiv exact i64 [[TMP35]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
|
||||
// CHECK1-NEXT: [[TMP37:%.*]] = add nuw i64 [[TMP36]], 1
|
||||
// CHECK1-NEXT: [[TMP38:%.*]] = mul nuw i64 [[TMP37]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
|
||||
// CHECK1-NEXT: store i64 [[TMP37]], i64* @{{reduction_size[.].+[.]}}, align 8
|
||||
// CHECK1-NEXT: store i64 [[TMP37]], i64* @{{reduction_size[.].+[.]}}, align 8, !noalias !12
|
||||
// CHECK1-NEXT: [[TMP39:%.*]] = load i8*, i8** [[TMP16]], align 8
|
||||
// CHECK1-NEXT: [[TMP40:%.*]] = call i8* @__kmpc_task_reduction_get_th_data(i32 [[TMP20]], i8* [[TMP39]], i8* [[TMP25]]) #[[ATTR5]]
|
||||
// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2
|
||||
|
|
Loading…
Reference in New Issue